PIC32MZ2048ECG100 데이터 시트보기 (PDF) - Microchip Technology

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PIC32MZ2048ECG100

32-bit MCUs (up to 2 MB Live-Update Flash and 512 KB SRAM) with Audio and Graphics Interfaces, HS USB, Ethernet, and Advanced Analog

Microchip Technology 

PIC32MZ Embedded Connectivity (EC) Family

Referenced Sources

This device data sheet is based on the following

individual sections of the “PIC32 Family Reference

Manual”. These documents should be considered as

the general reference for the operation of a particular

module or device feature.

Note:

To access the documents listed below,

browse the documentation section of the

Microchip website (www.microchip.com).

• Section 1. “Introduction” (DS60001127)

• Section 7. “Resets” (DS60001118)

• Section 8. “Interrupt Controller” (DS60001108)

• Section 9. “Watchdog, Deadman, and Power-up Timers” (DS60001114)

• Section 10. “Power-Saving Features” (DS60001130)

• Section 12. “I/O Ports” (DS60001120)

• Section 13. “Parallel Master Port (PMP)” (DS60001128)

• Section 14. “Timers” (DS60001105)

• Section 15. “Input Capture” (DS60001122)

• Section 16. “Output Compare” (DS60001111)

• Section 18. “12-bit Pipelined Analog-to-Digital Converter (ADC)” (DS60001194)

• Section 19. “Comparator” (DS60001110)

• Section 20. “Comparator Voltage Reference (CVREF)” (DS60001109)

• Section 21. “Universal Asynchronous Receiver Transmitter (UART)” (DS60001107)

• Section 23. “Serial Peripheral Interface (SPI)” (DS60001106)

• Section 24. “Inter-Integrated Circuit™ (I2C™)” (DS60001116)

• Section 29. “Real-Time Clock and Calendar (RTCC)” (DS60001125)

• Section 31. “Direct Memory Access (DMA) Controller” (DS60001117)

• Section 32. “Configuration” (DS60001124)

• Section 33. “Programming and Diagnostics” (DS60001129)

• Section 34. “Controller Area Network (CAN)” (DS60001154)

• Section 35. “Ethernet Controller” (DS60001155)

• Section 41. “Prefetch Module for Devices with L1 CPU Cache” (DS60001183)

• Section 42. “Oscillators with Enhanced PLL” (DS60001250)

• Section 46. “Serial Quad Interface (SQI)” (DS60001244)

• Section 47. “External Bus Interface (EBI)” (DS60001245)

• Section 48. “Memory Organization and Permissions” (DS60001214)

• Section 49. “Crypto Engine (CE) and Random Number Generator (RNG)” (DS60001246)

• Section 50. “CPU for Devices with microAptiv™ Core” (DS60001192)

• Section 51. “Hi-Speed USB with On-The-Go (OTG)” (DS60001232)

• Section 52. “Flash Program Memory with Support for Live Update” (DS60001193)

 2013 Microchip Technology Inc.

Preliminary

DS60001191B-page 13

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