MFRC522 데이터 시트보기 (PDF) - NXP Semiconductors.

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MFRC522

Standard performance MIFARE and NTAG frontend

NXP Semiconductors. 

NXP Semiconductors

MFRC522

Standard performance MIFARE and NTAG frontend

16.1.3.4 Example: Output test signals RxActive and TxActive

Figure 31 shows the RxActive and TxActive test signals relating to RF communication.

The AnalogTestReg register is set to CDh.

• At 106 kBd, RxActive is HIGH during data bits, parity and CRC reception. Start bits

are not included

• At 106 kBd, TxActive is HIGH during start bits, data bits, parity and CRC transmission

• At 212 kBd, 424 kBd and 848 kBd, RxActive is HIGH during data bits and CRC

reception. Start bits are not included

• At 212 kBd, 424 kBd and 848 kBd, TxActive is HIGH during data bits and CRC

transmission

001aak600

(1)

(2)

(3)

10 μs/div

(1) RxActive (2 V/div) on pin AUX1.

(2) TxActive (2 V/div) on pin AUX2.

(3) RF field.

Fig 31. Output RxActive on pin AUX1 and TxActive on pin AUX2

MFRC522

Product data sheet

COMPANY PUBLIC

All information provided in this document is subject to legal disclaimers.

Rev. 3.9 — 27 April 2016

112139

© NXP Semiconductors N.V. 2016. All rights reserved.

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