MMA8451QR1(2010) 데이터 시트보기 (PDF) - Freescale Semiconductor
부품명
상세내역
제조사
MMA8451QR1 Datasheet PDF : 53 Pages
| |||
3
Terminology
3.1 Sensitivity
The sensitivity is represented in counts/g. In 2g mode the sensitivity is 4096 counts/g. In 4g mode the sensitivity is 2048 counts/
g and in 8g mode the sensitivity is 1024 counts/g.
3.2 Zero-g Offset
Zero-g Offset (TyOff) describes the deviation of an actual output signal from the ideal output signal if the sensor is stationary. A
sensor stationary on a horizontal surface will measure 0g in X-axis and 0g in Y-axis whereas the Z-axis will measure 1g. The output
is ideally in the middle of the dynamic range of the sensor (content of OUT Registers 0x00, data expressed as 2's complement
number). A deviation from ideal value in this case is called Zero-g offset. Offset is to some extent a result of stress on the MEMS
sensor and therefore the offset can slightly change after mounting the sensor onto a printed circuit board or exposing it to
extensive mechanical stress.
3.3 Self-Test
Self-Test checks the transducer functionality without external mechanical stimulus. When Self-Test is activated, an electrostatic
actuation force is applied to the sensor, simulating a small acceleration. In this case the sensor outputs will exhibit a change in
their DC levels which are related to the selected full scale through the device sensitivity. When Self-Test is activated, the device
output level is given by the algebraic sum of the signals produced by the acceleration acting on the sensor and by the electrostatic
test-force.
4
Modes of Operation
SLEEP
ACTIVE
OFF
STANDBY
WAKE
Figure 6. MMA8451Q Mode Transition Diagram
Table 7. Mode of Operation Description
Mode
I2C Bus State
VDD
VDDIO
Function Description
OFF
Powered Down
<1.8 V VDDIO Can be > VDD
The device is powered off. All analog and digital blocks
are shutdown. I2C bus inhibited.
STANDBY
I2C communication with
MMA8451Q is possible
VDDIO = High
ON VDD = High
ACTIVE bit is cleared
Only digital blocks are enabled.
Analog subsystem is disabled. Internal clocks disabled.
ACTIVE
I2C communication with
(WAKE/SLEEP) MMA8451Q is possible
VDDIO = High
ON VDD = High
ACTIVE bit is set
All blocks are enabled (digital, analog).
All register contents are preserved when transitioning from ACTIVE to STANDBY mode. Some registers are reset when
transitioning from STANDBY to ACTIVE. These are all noted in the device memory map register table. The SLEEP and WAKE
modes are ACTIVE modes. For more information on how to use the SLEEP and WAKE modes and how to transition between
these modes please refer to the functionality section of this document.
Sensors
Freescale Semiconductor
MMA8451Q
13
Share Link: 