ATMEGA16U1 데이터 시트보기 (PDF) - Atmel Corporation

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ATMEGA16U1

8-bit Microcontroller with 16/32K Bytes of ISP Flash and USB Controller

Atmel Corporation 

ATmega16U4/ATmega32U4

“Memory Programming” on page 346 contains a detailed description on Flash data serial down-

loading using the SPI pins or the JTAG interface.

Constant tables can be allocated within the entire program memory address space (see the LPM

– Load Program Memory instruction description and ELPM - Extended Load Program Memory

instruction description).

Timing diagrams for instruction fetch and execution are presented in “Instruction Execution Tim-

ing” on page 14.

Figure 5-1. Program Memory Map

Program Memory

0x00000

Application Flash Section

Boot Flash Section

0x7FFF (32KBytes)

5.2 SRAM Data Memory

Figure 5-2 shows how the ATmega16U4/ATmega32U4 SRAM Memory is organized.

The ATmega16U4/ATmega32U4 is a complex microcontroller with more peripheral units than

can be supported within the 64 location reserved in the Opcode for the IN and OUT instructions.

For the Extended I/O space from $060 - $0FF in SRAM, only the ST/STS/STD and LD/LDS/LDD

instructions can be used.

The first 2,816 Data Memory locations address both the Register File, the I/O Memory,

Extended I/O Memory, and the internal data SRAM. The first 32 locations address the Register

file, the next 64 location the standard I/O Memory, then 160 locations of Extended I/O memory

and the next 2,560 locations address the internal data SRAM.

The five different addressing modes for the data memory cover: Direct, Indirect with Displace-

ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register file,

registers R26 to R31 feature the indirect addressing pointer registers.

The direct addressing reaches the entire data space.

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7766E–AVR–04/10

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