AB28F800BR-T80 데이터 시트보기 (PDF) - Intel
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AB28F800BR-T80 Datasheet PDF : 36 Pages
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A28F200BR
E
3.3.3
PROGRAM MODE
Programing is executed using a two-write
sequence. The Program Setup command is written
to the CUI followed by a second write which
specifies the address and data to be programmed.
The WSM will execute a sequence of internally
timed events to:
1. Program the desired bits of the addressed
memory word or byte.
2. Verify that the desired bits are sufficiently
programmed.
Programming of the memory results in specific bits
within a byte or word being changed to a “0.”
If the user attempts to program “1”s, there will be no
change of the memory cell content and no error
occurs.
Similar to erasure, the Status Register indicates
whether programming is complete. While the
program sequence is executing, bit 7 of the Status
Register is a “0.” The Status Register can be polled
by toggling either CE# or OE# to determine when
the program sequence is complete. Only the Read
Status Register command is valid while
programming is active.
Table 7. Status Register Bit Definition
WSMS
ESS
ES
DWS
VPPS
R
R
R
7
6
5
4
3
2
1
0
NOTES:
SR.7 =WRITE STATE MACHINE STATUS (WSMS)
1 = Ready
0 = Busy
Write State Machine bit must first be checked to
determine Byte/Word program or Block Erase
completion, before the Program or Erase Status
bits are checked for success.
SR.6 = ERASE-SUSPEND STATUS (ESS)
1 = Erase Suspended
0 = Erase In Progress/Completed
When Erase Suspend is issued, WSM halts
execution and sets both WSMS and ESS bits to “1.”
ESS bit remains set to “1” until an Erase Resume
command is issued.
SR.5 = ERASE STATUS
1 = Error In Block Erasure
0 = Successful Block Erase
When this bit is set to “1,” WSM has applied the
maximum number of erase pulses to the block and
is still unable to successfully verify block erasure.
SR.4 = PROGRAM STATUS
1 = Error in Byte/Word Program
0 = Successful Byte/Word Program
When this bit is set to “1,” WSM has attempted but
failed to program a byte or word.
SR.3 = VPP STATUS
1 = VPP Low Detect, Operation Abort
0 = VPP OK
The VPP Status bit, unlike an A/D converter, does
not provide continuous indication of VPP level. The
WSM interrogates VPP level only after the Byte
Program or Erase command sequences have been
entered, and informs the system if VPP has not
been switched on. The VPP Status bit is not
guaranteed to report accurate feedback between
VPPLK and VPPH.
SR.2–SR.0 = RESERVED FOR FUTURE
ENHANCEMENTS
These bits are reserved for future use and should
be masked out when polling the Status Register.
16
ADVANCE INFORMATION
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