29C516E(1997) 데이터 시트보기 (PDF) - Atmel Corporation

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29C516E
(Rev.:1997)

16–Bit Flow–Through EDAC Error Detection And Correction unit

Atmel Corporation 

10.2. Memory Read

Figure 6.Memory Read Timing Diagram

29C516E

CERR

NCERR

N22

MD[0..15]

MC[0..7]

CORRECT

t22

t22

t22

t18

UD1[0..15]

TRANS

RD/WR2

EN2

MEM2

t8

t5

t16

Valid Error Flag

t9

t6

t17

Valid Error Flag

Memory Data Word

Memory Check–bits

t15

t4

22..55

t7

t10

Corrected Data

Propagation Delays

Output Enable /

Disable Times

t4 *

34 ns

t9 *

32 ns

t18 *

23 ns

t5 *

33 ns

t10 *

19 ns

t22 *

19 ns

t6 *

34 ns

t7 *

32 ns

t8 *

31 ns

t15 *

24 ns

t16 *

24 ns

t17 *

24 ns

( * : Max Value )

( * : Max Value )

( * : Max Value )

13

Rev. D (09 Dec. 97)

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