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73S8009C 데이터 시트보기 (PDF) - Teridian Semiconductor Corporation

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73S8009C
TERIDIAN
Teridian Semiconductor Corporation TERIDIAN
73S8009C Datasheet PDF : 33 Pages
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DS_8009C_025
73S8009C Data Sheet
Symbol Parameter
Condition
Min Nom Max
Unit
Interface Requirements – Data Signals: I/O, AUX1, AUX2, and host interfaces: I/OUC, AUX1UC,
AUX2UC, DP, DM. ISHORTL, ISHORTH, and VINACT requirements do not pertain to I/OUC, AUX1UC, AUX2UC
VOH
Output level, high (I/O,
IOH =0
AUX1, AUX2)
0.9 * VCC
VCC+0.1
V
VOH
Output level, high (I/OUC, IOH = -40 µA
AUX1UC, AUX2UC)
IOH =0
VOL
Output level, low (I/O,
IOH = -40 µA
AUX1, AUX2)
IOL=1 mA
VOL
Output level, low (I/OUC, IOL=1 mA
AUX1UC, AUX2UC)
0.75 VCC
VCC+0.1
V
0.9 VDD
VDD+0.1
V
0.75 VDD
VDD+0.1
V
0.15 *VCC V
0.3
V
VIH
Input level, high (I/O,
AUX1, AUX2)
0.6 * VCC
VCC+0.30
V
VIH
Input level, high (I/OUC,
AUX1UC, AUX2UC)
0.6 * VDD
VDD+0.30
V
VIL
Input level, low (I/O,
AUX1, AUX2)
-0.15
0.2 * VCC
V
VIL
Input level, low (I/OUC,
AUX1UC, AUX2UC)
-0.15
0.2 * VDD
V
VINACT
ILEAK
IIL
Output voltage when
outside of session
Input leakage
Input current, low (I/O,
AUX1, AUX2)
IOL = 0
IOL = 1 mA
VIH = VCC
VIL = 0
0.1
V
0.3
V
10
µA
0.65
mA
IIL
Input current, low (I/OUC, VIL = 0
AUX1UC, AUX2UC)
0.7
mA
ISHORTL
ISHORTH
Short circuit output
current
Short circuit output
current
For output low, shorted to
VCC through 33
For output high, shorted to
ground through 33
15
mA
15
mA
tR, tF
Output rise time, fall
For I/O, AUX1, AUX2,
times
CL = 80pF, 10% to 90%.
For I/OUC, AUX1UC,
AUX2UC, CL=50Pf, 10%
to 90%.
100
ns
tIR, tIF
Input rise, fall times
1
µs
RPU
Internal pull-up resistor Output stable for >200ns
8
11
14
k
FDMAX
TFDIO
TRDIO
Maximum data rate
Delay, I/O to I/OUC, AUX1
to AUX1UC, AUX2 to
AUX2UC,I/OUC to I/O,
AUX1UC to AUX1, AUX2UC
to AUX2 (respectively falling
edge to falling edge and
rising edge to rising edge)
Edge from master to
slave, measured at 50%
1
MHz
60
100
200
ns
15
ns
CIN
Input capacitance
10
pF
Rev. 1.4
13

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