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73S8009C 데이터 시트보기 (PDF) - Teridian Semiconductor Corporation

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73S8009C
TERIDIAN
Teridian Semiconductor Corporation TERIDIAN
73S8009C Datasheet PDF : 33 Pages
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DS_8009C_025
73S8009C Data Sheet
VPC
See NOTE 2
VDD_supply_to_uC
See NOTE 8
OFF_interrupt_to_uC
VDD
See NOTE 7
10µH
See NOTE 3 C3
VBAT
10µF
I/OUC_to/from_uC
AUX1UC_to/from_uC
AUX2UC_to/from_uC
CMDVCC%_from_uC
CMDVCC#_from_uC
RSTIN_from_uC
1
2
3
4
I/OUC
AUX1UC
AUX2UC
CMDVCC%
5 CMDVCC#
6
7
8
RSTIN
CLKIN
RDY
CLKIN_from_uC
RDY_status_to_uC
OFF_ACK_from_uC
73S80009C
OFF_REQ_to_uC
CS_from_uC
See
NOTE 4
NOTES:
1) VBUS = 4.5V to 5.5V DC.
4.7µF
2) VPC = 2.7V to 6.5V DC (should only be used when VBAT and
C2
VBUS are unused)
3) VBAT = 4.0V to 6.5V DC.
4) Internal pull-up allows it to be left open if unused.
5) Resistor footpring is included in case some filtering is needed on CLK
6) Capacitors C4 and C5 are provisional and their footprints should be
added for added noise rejection if necessary.
7) Inductor must be rated for 400 mA maximum peak current.
8) VDD - 3.3V, +/- 0.3V, 40mA max. Requires min two 0.1µF caps to gnd)
See NOTE 1
VBUS
Pushbutton Switch
ON/OFF
VBUS
24
23
I/O
AUX1
22
21
AUX2 20
VCC
RST
GND
19
18
17
SW1
27pF
32 QFN
See
NOTE 5
0
C5
27pF
VDD
C4
R2
20K
Card detection
switch is
normally closed
See
NOTE 6
See
NOTE 6
0.47µF, Low ESR (<100mohms)
should be placed near the
C1
SC connecter contact
CLK track should be routed
far from RST, I/O, C4 and C8
Smart Card Connector
Figure 4: Typical 73S8009C Application Schematic
Rev. 1.4
17

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