ACPL-K64L-560E 데이터 시트보기 (PDF) - Avago Technologies
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ACPL-K64L-560E Datasheet PDF : 16 Pages
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Speed Improvement
A peaking capacitor can be placed across the input current
limit resistor (Figure 16) to achieve enhanced speed per-
formance. The value of the peaking cap is dependent
to the rise and fall time of the input signal and supply
voltages and LED input driving current (IF). Figure 17
shows significant improvement of propagation delay and
pulse with distortion with added peak capacitor at driving
current of 2mA and 3.3V/5V power supply.
Cpeak
+
R1
Vin
−
VDD2
V0
0.1µF
R2
GND1
SHIELD
GND2
Figure 16. Connection of peaking capacitor (Cpeak) in parallel of the input
limiting resistor (R1) to improve speed performance
VDD2 = 5 V, IF = 2 mA
60
50
TPHL
TPLH
40
TPHL
TPLH
30
20
PWD
No Peaking
With Peaking
10
0
-40 -20 0 20 40 60 80 100
Temp (°C)
(i) VDD = 5V, Cpeak = 47pF, R1 = 845Ω
VDD2 = 3.3 V, IF = 2 mA
60
50
TPHL
TPLH
40
30
TPLH
TPHL
20
No Peaking
With Peaking
10
0
-40 -20 0
PWD
20 40 60 80 100
Temp (°C)
(ii) VDD = 3.3V, Cpeak = 47pF, R1 = 430Ω
Figure 17. Improvement of tp and PWD with added 100pF peaking capacitor
in parallel of input limiting resistor.
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Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved.
AV02-2150EN - May 31, 2013
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