ACPL-W314-060E(2009) 데이터 시트보기 (PDF) - Avago Technologies
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ACPL-W314-060E Datasheet PDF : 13 Pages
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Figure 25. Recommended LED Drive Circuit for Ultra-High CMR Dead Time
and Propagation Delay Specifications.
Delaying the LED signal by the maximum propagation
delay difference ensures that the minimum dead time is
zero, but it does not tell a designer what the maximum
dead time will be. The maximum dead time is equivalent
to the difference between the maximum and minimum
propagation delay difference specification as shown in
Figure 27. The maximum dead time for the ACPL-P314/
W314 is 1 µs (= 0.5 µs - (-0.5 µs)) over the operating tem-
perature range of –40°C to 100°C.
Dead Time and Propagation Delay Specifications
The ACPL-P314/W314 includes a Propagation Delay Dif-
ference (PDD) specification intended to help designers
minimize “dead time” in their power inverter designs.
Dead time is the time high and low side power transistors
are off. Any overlap in Ql and Q2 conduction will result
in large currents flowing through the power devices
from the high voltage to the low-voltage motor rails.
To minimize dead time in a given design, the turn on of
LED2 should be delayed (relative to the turn off of LED1)
so that under worst-case conditions, transistor Q1 has
just turned off when transistor Q2 turns on, as shown in
Figure 26. The amount of delay necessary to achieve this
condition is equal to the maximum value of the propa-
gation delay difference specification, PDD max, which is
specified to be 500 ns over the operating temperature
range of -40° to 100°C.
Figure 27. Waveforms for Dead Time.
Note that the propagation delays used to calculate PDD
and dead time are taken at equal temperatures and test
conditions since the optocouplers under consideration
are typically mounted in close proximity to each other
and are switching identical IGBTs.
Figure 26. Minimum LED Skew for Zero Dead Time.
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AV02-0158EN - June 30, 2009
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