ACPL-K73L 데이터 시트보기 (PDF) - Avago Technologies

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ACPL-K73L

Single-channel and Dual-channel High Speed 15 MBd CMOS optocoupler with Glitch-Free Power-Up Feature

Avago Technologies 

Common Mode Rejection for ACPL-W70L AND ACPL-K73L

Figure 13 shows the recommended driving circuit for the

ACPL-W70L and ACPL-K73L for optimal common-mode re-

jection performance. Two LED-current setting resistors are

used instead of one. This is to balance the common mode

impedance at LED anode and cathode. Common-mode

transients can capacitively couple from the LED anode (or

cathode) to the output-side ground causing current to be

shunted away from the LED (which can be bad if the LED

is on) or conversely cause current to be injected into the

LED (bad if the LED is meant to be off ). Figure14 shows the

parasitic capacitances which exists between LED anode/

cathode and output ground (CLA and CLC). Also shown in

Figure 14 on the input side is an AC-equivalent circuit.

Table 1 indicates the directions of ILP and ILN flow depend-

ing on the direction of the common-mode transient. For

transients occurring when the LED is on, common-mode

rejection (CML, since the output is in the “low” state) de-

pends upon the amount of LED current drive (IF). For con-

ditions where IF is close to the switching threshold (ITH),

CML also depends on the extent which ILP and ILN balance

each other. In other words, any condition where common-

mode transients cause a momentary decrease in IF (i.e.

when dVCM/dt>0 and |IFP| > |IFN|, referring to Table 1) will

cause common-mode failure for transients which are fast

enough.

Likewise for common-mode transients which occur when

the LED is off (i.e. CMH, since the output is “high”), if an im-

balance between ILP and ILN results in a transient IF equal

to or greater than the switching threshold of the optocou-

pler, the transient “signal” may cause the output to spike

below 2V (which constitutes a CMH failure).

By using the recommended circuit in Figure 13, good CMR

can be achieved. The resistors recommended in Figure 13

include both the output impedence of the logic driver cir-

cuit and the external limiting resistor. The balanced ILED-

setting resistors help equalize the common mode voltage

change at anode and cathode to reduce the amount by

which ILED is modulated from transient coupling through

CLA and CLC.

V DD1

74LS04 OR ANY TOTEM-

POLE OUTPUT LOGIC GATE

GND 1

Rtotal =300Ω for VDD=3.3V

= 580Ω for VDD=5V

1/2R total

V DD2

1/2R total

VO

0.1µF

SHIELD

GND 2

Figure 13. Recommended drive circuit for ACPL-W70L and ACPL-K73L for high-CMR

½ R total

½ R total

ILP

C LA

ILN CLC

SHIELD

VDD2

0.1µF

VO

15pF

GND2

74L504

(ANY

TTL/CMOS

GATE)

VDD

530 Ω

ACPL-W70L

2N3906

1

(ANY PNP)

LED

3

Figure 14. AC equivalent of ACPL-W70L and ACPL-K73L

VDD

12

VDD

ACPL-W70L

530 Ω

1

ACPL-W70L

1

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