AD7788 데이터 시트보기 (PDF) - Analog Devices
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AD7788 Datasheet PDF : 20 Pages
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AD7788/AD7789
ADC CIRCUIT INFORMATION
OVERVIEW
The AD7788/AD7789 is a low power ADC that incorporates a
∑-∆ modulator and on-chip digital filtering intended for the
measurement of wide dynamic range, low frequency signals
such as those in pressure transducers, weigh scales, and
temperature measurement applications.
The part has one unbuffered differential input. The device
requires an external reference voltage between 0.1 V and VDD.
Figure 10 shows the basic connections required to operate
the part.
POWER
SUPPLY
0.1µF
10µF
IN+
OUT–
IN–
OUT+
VDD
REFIN(+)
AD7788/
AD7789
AIN(+)
CS
AIN(–)
DOUT/RDY
SCLK
REFIN(–)
GND
MICROCONTROLLER
03539-0-006
Figure 10. Basic Connection Diagram
The output rate of the AD7788/AD7789 (fADC) is 16.6 Hz with
the settling time equal to 2 × tADC (120.4 ms). Normal mode
rejection is the major function of the digital filter. Simultaneous
50 Hz and 60 Hz rejection is optimized as notches are placed at
both 50 Hz and 60 Hz with this update rate (see Figure 6).
NOISE PERFORMANCE
The AD7788/AD7789 has an rms noise of 1.5 µV rms typically,
which corresponds to a peak-to-peak resolution of 16 bits for
the AD7788 and 19 bits (equivalent to an effective resolution of
21.5 bits) for the AD7789. The numbers given are for the bipo-
lar input range with a reference of 2.5 V. The noise was
measured with a differential input voltage of 0 V. The peak-to-
peak resolution figures represent the resolution for which there
will be no code flicker within a six-sigma limit. The output
noise comes from two sources. The first is the electrical noise in
the semiconductor devices (device noise) used in the imple-
mentation of the modulator. The second is quantization noise,
which is added when the analog input is converted into the
digital domain.
DIGITAL INTERFACE
As previously outlined, the AD7788/AD7789’s programmable
functions are controlled using a set of on-chip registers. Data is
written to these registers via the part’s serial interface and read
access to the on-chip registers is also provided by this interface.
All communications with the part must start with a write to the
communications register. After power-on or reset, the device
expects a write to its communications register. The data written
to this register determines whether the next operation is a read
operation or a write operation and also determines to which
register this read or write operation occurs. Therefore, write
access to any of the other registers on the part begins with a
write operation to the communications register followed by a
write to the selected register. A read operation from any other
register (except when continuous read mode is selected) starts
with a write to the communications register followed by a read
operation from the selected register.
The AD7788/AD7789’s serial interface consists of four signals:
CS, DIN, SCLK, and DOUT/RDY. The DIN line is used to
transfer data into the on-chip registers while DOUT/RDY is
used for accessing from the on-chip registers. SCLK is the serial
clock input for the device and all data transfers (either on DIN
or DOUT/RDY) occur with respect to the SCLK signal. The
DOUT/ RDY pin operates as a Data Ready signal also, the line
going low when a new data-word is available in the output reg-
ister. It is reset high when a read operation from the data
register is complete. It also goes high prior to the updating of
the data register to indicate when not to read from the device to
ensure that a data read is not attempted while the register is
being updated. CS is used to select a device. It can be used to
decode the AD7788/AD7789 in systems where several compo-
nents are connected to the serial bus.
Figure 3 and Figure 4 show timing diagrams for interfacing to
the AD7788/AD7789 with CS being used to decode the part.
Figure 3 shows the timing for a read operation from the
AD7788/AD7789’s output shift register while Figure 4 shows
the timing for a write operation to the input shift register. In all
modes except continuous read mode, it is possible to read the
same word from the data register several times even though the
DOUT/RDY line returns high after the first read operation.
However, care must be taken to ensure that the read operations
have been completed before the next output update occurs. In
continuous read mode, the data register can be read only once.
Rev. 0 | Page 14 of 20
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