AD9915(RevA) 데이터 시트보기 (PDF) - Analog Devices
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AD9915 Datasheet PDF : 48 Pages
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AD9915
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
General Description ......................................................................... 3
Specifications..................................................................................... 4
DC Specifications ......................................................................... 4
AC Specifications.......................................................................... 5
Absolute Maximum Ratings............................................................ 8
Thermal Performance .................................................................. 8
ESD Caution.................................................................................. 8
Pin Configuration and Function Descriptions............................. 9
Typical Performance Characteristics ........................................... 12
Equivalent Circuits ......................................................................... 16
Theory of Operation ...................................................................... 17
Single Tone Mode ....................................................................... 17
Profile Modulation Mode.......................................................... 17
Digital Ramp Modulation Mode .............................................. 17
Parallel Data Port Modulation Mode....................................... 17
Programmable Modulus Mode................................................. 17
Mode Priority.............................................................................. 18
Functional Block Detail ................................................................. 19
DDS Core..................................................................................... 19
REVISION HISTORY
8/12—Rev. 0 to Rev. A
Changed External Clock Frequency from 3.5 GHz to 2.5 GHz
and Differential Input Voltage Unit from mV p-p to V p-p ....... 4
Updated Outline Dimensions ....................................................... 47
7/12—Revision 0: Initial Version
Data Sheet
12-Bit DAC Output .................................................................... 20
DAC Calibration Output ........................................................... 20
Reconstruction Filter ................................................................. 20
Clock Input (REF_CLK/REF_CLK) ........................................ 21
PLL Lock Indication .................................................................. 22
Output Shift Keying (OSK)....................................................... 22
Digital Ramp Generator (DRG) ............................................... 23
Power-Down Control ................................................................ 27
Programming and Function pins ................................................. 28
Serial Programming ....................................................................... 31
Control Interface—Serial I/O ................................................... 31
General Serial I/O Operation ................................................... 31
Instruction Byte .......................................................................... 31
Serial I/O Port Pin Descriptions .............................................. 31
Serial I/O Timing Diagrams ..................................................... 32
MSB/LSB Transfers .................................................................... 32
Parallel Programming (8-/16-Bit) ................................................ 33
Multiple Chip Synchronization .................................................... 34
Register Map and Bit Descriptions .............................................. 36
Register Bit Descriptions........................................................... 41
Outline Dimensions ....................................................................... 47
Ordering Guide .......................................................................... 47
Rev. A | Page 2 of 48
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