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ADL5385 데이터 시트보기 (PDF) - Analog Devices

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ADL5385 Datasheet PDF : 26 Pages
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Data Sheet
ADL5385
EVALUATION BOARD
Two populated, RoHS-compliant ADL5385 evaluation boards are
available (the ADL5385-EVALZ and the ADL5385-DIFFLO-EBZ).
The ADL5385-DIFFLO-EBZ can be configured to allow a
differential LO drive through a balun or direct interfacing to a
PLL evaluation board. It also includes component pads in its LO
path to accommodate a harmonic filter. The four baseband
inputs are located on one edge of the board to allow direct
connection to a high-speed DAC evaluation board. The
ADL5385-DIFFLO-EBZ also includes an RF/IF amplifier. The
modulator output can be measured directly at the RF_OUT
SMA connector. Alternatively, by removing R40, and installing
GND
GND
GND
a 0 Ω resistor in the R25 pad, the modulator output can be fed
to the RF amplifier.
The ADL5385-DIFFLO-EBZ ships installed with an ADL5601
amplifier (50 MHz to 4000 MHz RF/IF amplifier). ADL5602
can be used if more gain is needed. Figure 43, Table 8, Figure 44,
and Figure 45 show the schematic, configuration options, and
layouts for the ADL5385-DIFFLO-EBZ, respectively.
A standalone ADL5385-EVALZ is also available. Figure 46, Table 9,
and Figure 47 show the schematic, configuration options, and
layout, respectively.
GND
GND
GND
QNBB
GND
QPBB
GND
C76
D.N.I
C75
D.N.I
C41
D.N.I
C82
D.N.I
R2
0Ω
C81
D.N.I
R1
0Ω
C80
D.N.I
C88
D.N.I
R17
0Ω
C87
D.N.I
R6
0Ω
C86
D.N.I
GND GND
GND
C90
D.N.I
C89
D.N.I
C91
D.N.I
R36
0Ω
C84
D.N.I
R33
0Ω
C83
D.N.I
C85
D.N.I
R4
0Ω
C78
D.N.I
R3
0Ω
C77
D.N.I
C79
D.N.I
GND GND
GND
VP
INBB
GND
IPBB
GND
R61
GND
10kΩ
ON S1 OFF
3
2
VP
LO_IP
GND
LO_IN
GND
C18
D.N.I
C40
0
C17
D.N.I
R15
D.N.I
R34
0
C16
D.N.I
R32
D.N.I
R13
0Ω
R431
C14
6 0Ω 1 0.1µF
PRI
SEC
T1 OR T22
4
3
0Ω
R10 R111
0
D.N.I
C15
0.1µF
GND
COM3 19
COM3 20
LOIP 21
LOIN 22
VPS3
23
VPS3 24
12
11
ADL5385 10
U1
9
EXPOSED PADDLE
8
7
GND GND
VP
VP1
RED
C3
10µF
C8
0.1µF
C11
100pF
GND
GND
GND
GND
GND1
BLACK
GND2
BLACK
1SINGLE-ENDED LO DRIVINGAT LOIP.
2DIFFERENTIAL LO DRIVINGAT LOIP WITH T1 OR T2.
T1 TC1-1-43A+
T2 TC1-1-13M+
GND
GND
ENBL
VPS2
TEMP
VPS1
VPS1
VOUT
R62
1
49.9Ω
C9
100pF
C6
0.1µF
GND
GND
GND
VP
RTEMP
200Ω
TEMP
YEL
C5
100pF
C4
0.1µF
GND
GND
RF_OUT
C31
0.1µF
R40
VPOS_AMP
D.N.I
GND
RED
R8
0
VP
GND
D.N.I
(2)
R25
C45 C44 C43
0Ω
68pF 1.2nF 1µF
U2
ADL5601
GND GND GND
1
2
3
L8
470nH
AMP_OUT
GND
C47
0.1µF
GND
Figure 43. ADL5385-DIFFLO-EBZ Schematic
Table 8. ADL5385-DIFFLO-EBZ Configuration Options
Component
Description
VP1, VPOS_AMP, GND1, GND2 Power supply clip leads, and ground clip leads.
GND
S1, R61, R62
R1, R2, R3, R4, R6, R17,
R33, R36, C41, C75 to C91
C14, C15
R15, R32, R34, C16 to C18, C40
LO_IP SMA, R10, R11, R13,
R15, R32, R34, R43, C40, T1, T2
Device enable select. Set S1 to VP to enable the device. Set S1
to GND to power down the device.
Baseband input filters. These components can be used to
implement a low-pass filter for the baseband signals.
LO driving capacitor.
LO input filters. These components can be used to
implement a filter for the LO input signals.
Single-ended LO input at LOIP.
Rev. B | Page 21 of 26
Default Value
Red (VP1) = 5 V, red (VPOS_AMP) = GND, GND1
and GND2 = black
Not applicable
S1 = on, R61 = 10 kΩ, R62 = 49.9 Ω
R1, R2, R3, R4, R6, R17, R33, R36 = 0 Ω,
C41, C75 to C91 = open
C14, C15 = 0.1 µF
R15, R32 = open, R34, C40 = 0 Ω,
C16 to C18 = open
R11, R13, R34, R43, C40 = 0 Ω,
R10, R15, R32 = open, T1, T2 = open

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