ADP130 데이터 시트보기 (PDF) - Analog Devices
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ADP130 Datasheet PDF : 20 Pages
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APPLICATIONS INFORMATION
CAPACITOR SELECTION
Output Capacitor
The ADP130 is designed for operation with small, space-saving
ceramic capacitors, but it functions with most commonly used
capacitors as long as care is taken regarding the effective series
resistance (ESR) value. The ESR of the output capacitor affects
the stability of the LDO control loop. A minimum of 0.70 μF
capacitance with an ESR of 1 Ω or less is recommended to ensure
stability of the ADP130. Transient response to changes in load
current is also affected by output capacitance. Using a larger value
of output capacitance improves the transient response of the
ADP130 to large changes in load current. Figure 34 and Figure 35
show the transient responses for output capacitance values of
1 μF and 10 μF, respectively.
ILOAD
1mA TO 350mA LOAD STEP
2.5A/µs
1
200mA/DIV
2
VOUT
50mV/DIV
–VOUT = 1.8V
CIN = COUT = 1µF
CH1 200mA CH2 50mV M400ns
T 14%
A CH1 192mA
Figure 34. Output Transient Response, COUT = 1 μF
ILOAD
1mA TO 350mA LOAD STEP
2.5A/µs
1
200mA/DIV
2
VOUT
50mV/DIV
–VOUT = 1.8V
CIN = COUT = 10µF
CH1 200mA CH2 50mV M400ns
T 13%
A CH1 160mA
Figure 35. Output Transient Response, COUT = 10 μF
ADP130
Input Bypass Capacitor
Connecting a 1 μF capacitor from VIN to GND reduces the circuit
sensitivity to printed circuit board (PCB) layout, especially when
long input traces or high source impedance are encountered.
If >1 μF of output capacitance is required, the input capacitor
should be increased to match it.
Bias Capacitor
Connecting a 1 μF capacitor from VBIAS to GND reduces the
circuit sensitivity to PCB layout, especially when long input traces
or high source impedance are encountered.
Input, Bias, and Output Capacitor Properties
Any good quality ceramic capacitor can be used with the ADP130,
as long as it meets the minimum capacitance and maximum ESR
requirements. Ceramic capacitors are manufactured with a variety
of dielectrics, each with different behavior over temperature and
applied voltage. Capacitors must have a dielectric adequate to
ensure the minimum capacitance over the necessary temperature
range and dc bias conditions. X5R or X7R dielectrics with a voltage
rating of 6.3 V or 10 V are recommended. Y5V and Z5U dielectrics
are not recommended for use with any LDO, due to their poor
temperature and dc bias characteristics.
Figure 36 shows the capacitance vs. voltage bias characteristics
of the 0402 1μF, 10 V, X5R capacitor. The voltage stability of a
capacitor is strongly influenced by the capacitor size and voltage
rating. In general, a capacitor in a larger package or higher voltage
rating exhibits better stability. The temperature variation of the
X5R dielectric is about ±15% over the −40 to +85°C temperature
range and is not a function of the package or voltage rating.
1.2
1.0
0.8
0.6
0.4
0.2
0
0
2
4
6
8
10
VOLTAGE (V)
Figure 36. Capacitance vs. Voltage Characteristics
Rev. 0 | Page 13 of 20
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