ADP130 데이터 시트보기 (PDF) - Analog Devices

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ADP130

350 mA, Low VIN, Low Quiescent Current, CMOS Linear Regulator

Analog Devices 

ADP130

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

VIN 1

5 VOUT

ADP130

GND 2 TOP VIEW

(Not to Scale)

EN 3

4 VBIAS

Figure 3. Pin Configuration

Table 5. Pin Function Descriptions

Pin No. Mnemonic Description

1

VIN

Regulator Input Supply. Bypass VIN to GND with a capacitor of 1 μF or greater.

2

GND

Ground.

3

EN

Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic startup,

connect EN to VBIAS

4

VBIAS

Bias Input Supply. Connect a capacitor of 1 μF or greater between VBIAS and GND.

5

VOUT

Regulated Output Voltage. Bypass VOUT to GND with a capacitor of 1 μF or greater.

Rev. 0 | Page 6 of 20

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