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AN7198Z 데이터 시트보기 (PDF) - Panasonic Corporation

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AN7198Z
Panasonic
Panasonic Corporation Panasonic
AN7198Z Datasheet PDF : 20 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
ICs for Audio Common Use
AN7198Z
s Technical Information (continued)
4. Countermeasure for shock noise of the AN7198Z (continued)
2) Standby pin to off (pin 5 VSTB = 5 V 0 V) (Operating state Standby state)
(1) Ripple filter pin (pin 12) becomes off gradually (Discharge down to 0 V) when VSTB = 5 V 0 V.
Current source and reference voltage are on until VRF < 2 VBE.
(2) Output D range suppression circuit operates when the ripple filter pin voltage is less than 6.8 V.
The circuit limits to 0 V < VOUT < VRF 3 VBE.
DC voltage change of input circuit causes steep DC voltage change of output pin and that generates shock
noise same as at standby pin is on.
This steep DC voltage change can be suppressed by the above mentioned circuit.
Voltage of the mute pin (pin 7) makes high forcedly in the inside circuit.
(3) Input mute is on when ripple filter pin voltage VRF is less than 6.8 V. This prevents the shock noise which is
inputted from the pre-stage of power amp.
Also, mute is on in order to prevent the abnormal sound which is generated by clipping of waveform. (The
purpose is same as the countermeasure of start up period.)
(4) DC voltage of output pin changes with 1/2 voltage of the ripple filter pin.
Steep changes of output pin voltage is suppressed by start up gradually of the ripple filter pin.
(5) Output waveform of each plus and minus output at power supply on changes as same by symmetric placement
of inverting and non-inverting amplifier which consist of BTL amp.
12
10
RF
Output D-range
3 VBE Clamp-off
Mute-on
VOUT without D-range
suppression circuit
Reference voltage off
Constant current source
8
VOUT
6
4
VSTB-off
2
0
Mute-on
t
Image figure of output waveform, RF-pin waveform has exponential characteristics in actually.
3) Muting on/off (Pin7 low: Muting state, high: Operating state)
(1) AC mute circuit which mute the AC component only by the simple attenuator circuit is adopted.
Conventional system generates shock noise due to change steeply of output DC voltage by cutting of input
DC voltage and muting of AC component.
6
30 k
5V
Mute
22 k
0V
7
1.0 µF
10 k
2
Att.
600 15 k
0 dB
4
600 15 k
VREF =
1
2
VCC
IO
Figure 12
19

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