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AS3932 데이터 시트보기 (PDF) - austriamicrosystems AG

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AS3932
AmsAG
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AS3932 Datasheet PDF : 33 Pages
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AS3932
Data Sheet - Detailed Description
Figure 15. Reading of Single Register Byte
CS
S CLK
SDI
X0
1
A5
A4
A3
A2
A1
A0
X
SDO
X
D7
D6
D5 D4
D3
D2
D1
D0
X
01 pattern
indicat es
READ Mode
SCLK raising
edge Dat a is
transfered from
µC
SCLK
f alling edge
Data is
sampled
SCLK rais ing
edge Data is
mov ed f rom
A ddr ess
< A 5-A 0>
SCLK falling
edge Dat a is
transfered to
µC
CS falling
edge signals
end of READ
Mode
Figure 16. Send Direct COMMAND byte
8.4 Channel Amplifier and Frequency Detector
Each of the 3 channels consists of a variable gain amplifier, an automatic gain control and a frequency detector. The latter detects the presence
of a carrier. As soon as the carrier is detected the AGC is enabled, the gain of the VGA is reduced and set to the right value and the RSSI can be
displayed.
It is possible to enable/disable individual channels, in case not all three channels are needed. This enables to reduce the current consumption by
1.5 µA (typ.) per channel.
8.4.1 Frequency Detector / AGC
The frequency detection uses the RTC as time base. In case the internal RC oscillator is used as RTC, it must be calibrated, but the calibration
is guaranteed for a 32.768 kHz crystal oscillator only. The frequency detection criteria can be tighter or more relaxed according to the setup
described in R2<1:0>(see Table 13).
Table 13. Tolerance Settings for Wakeup
R2<1>
R2<0>
Tolerance
0
0
0
1
relaxed
tighter (medium)
1
0
1
1
stringent
Reserved
www.austriamicrosystems.com/AS3932
Revision 1.2
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