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AT49BV163D

16-megabit (1M x 16/2M x 8) 3-volt Only Flash Memory

Atmel Corporation 

AT49BV163D(T)

4.11

128-bit Protection Register

The AT49BV163D(T) contains a 128-bit register that can be used for security purposes in sys-

tem design. The protection register is divided into two 64-bit blocks. The two blocks are

designated as block A and block B. The data in block A is non-changeable and is programmed

at the factory with a unique number. The data in block B is programmed by the user and can be

locked out such that data in the block cannot be reprogrammed. To program block B in the pro-

tection register, the four-bus cycle Program Protection Register command must be used as

shown in the “Command Definition Table” on page 11. To lock out block B, the four-bus cycle

Lock Protection Register command must be used as shown in the “Command Definition Table” .

Data bit D1 must be zero during the fourth bus cycle. All other data bits during the fourth bus

cycle are don’t cares. To determine whether block B is locked out, the Product ID Entry com-

mand is given followed by a read operation from address 80H. If data bit D1 is zero, block B is

locked. If data bit D1 is one, block B can be reprogrammed. Please see the “Protection Register

Addressing Table” on page 12 for the address locations in the protection register. To read the

protection register, the Product ID Entry command is given followed by a normal read operation

from an address within the protection register. After determining whether block B is protected or

not, or reading the protection register, the Product ID Exit command must be given prior to per-

forming any other operation.

4.12 RDY/BUSY

An open-drain READY/BUSY output pin provides another method of detecting the end of a pro-

gram or erase operation. RDY/BUSY is actively pulled low during the internal program and erase

cycles and is released at the completion of the cycle. The open-drain connection allows for OR-

tying of several devices to the same RDY/BUSY line. Please see “Status Bit Table” on page 10

for more details.

4.13

Common Flash Interface (CFI)

CFI is a published, standardized data structure that may be read from a flash device. CFI allows

system software to query the installed device to determine the configurations, various electrical

and timing parameters, and functions supported by the device. CFI is used to allow the system

to learn how to interface to the flash device most optimally. The two primary benefits of using

CFI are ease of upgrading and second source availability. The command to enter the CFI Query

mode is a one-bus cycle command which requires writing data 98h to address 55h. The CFI

Query command can be written when the device is ready to read data or can also be written

when the part is in the product ID mode. Once in the CFI Query mode, the system can read CFI

data at the addresses given in “Common Flash Interface Definition Table” on page 22. To exit

the CFI Query mode, the product ID exit command must be given.

4.14

Hardware Data Protection

The Hardware Data Protection feature protects against inadvertent programs to the

AT49BV163D(T) in the following ways: (a) VCC sense: if VCC is below 1.8V (typical), the program

function is inhibited. (b) Program inhibit: holding any one of OE low, CE high or WE high inhibits

program cycles.

4.15

Input Levels

While operating with a 2.65V to 3.6V power supply, the address inputs and control inputs (OE,

CE and WE) may be driven from 0 to 5.5V without adversely affecting the operation of the

device. The I/O lines can only be driven from 0 to VCC + 0.6V.

7

3590A–FLASH–12/05

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