AT93C46A-10SU-1.8 데이터 시트보기 (PDF) - Atmel Corporation

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AT93C46A-10SU-1.8

Three-wire Serial EEPROM

Atmel Corporation 

status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS).

The WRAL instruction is valid only at VCC = 5.0V ± 10%.

ERASE/WRITE DISABLE (EWDS): To protect against accidental data disturb, the

Erase/Write Disable (EWDS) instruction disables all programming modes and should be

executed after all programming operations. The operation of the Read instruction is

independent of both the EWEN and EWDS instructions and can be executed at any

time.

Timing Diagrams

Figure 2. Synchronous Data Timing

µs(1)

Note: 1. This is the minimum SK period.

Table 6. Organization Key for Timing Diagrams

I/O

AN

DN

AT93C46A

x 16

A5

D15

6 AT93C46A

0539K–SEEPR–2/07

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