ATA6620 데이터 시트보기 (PDF) - Atmel Corporation
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ATA6620 Datasheet PDF : 20 Pages
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ATA6620
8. Electrical Characteristics (Continued)
5V < VS < 18V, Tamb = –40°C to 125°C
No. Parameters
Test Conditions
Pin Symbol Min.
Typ.
Max.
Unit
9 LIN Bus Receiver
9.1
Center of receiver
threshold
VBUS_CNT =
(Vth_dom + Vth_rec)/2
9.2 Receiver dominant state VEN = 5V
9.3 Receiver recessive state VEN = 5V
9.4
Receiver input
hysteresis
Vhys = Vth_rec – Vth_dom
9.5
Wake detection LIN
High level input voltage
LIN
VBUS_CNT
0.475 ×
VS
0.5 ×
VS
0.525 ×
VS
V
LIN
VBUSdom
–27
0.4 × VS
V
LIN
VBUSrec 0.6 × VS
40
V
LIN
VBUShys
0.028 ×
VS
0.1 x VS
0.175 ×
VS
V
LIN
VLINH
VS – 1V
VS + 0.3V V
9.6
Wake detection LIN
Low level input voltage
ILIN = typically –3 mA
LIN
VLINL
–27
VS – 3.3V V
10 Internal Timers
10.1
Dominant time for
wake–up via LIN bus
VLIN = 0V
tbus
30
90
150
µs
Time delay for mode
10.2
change from Pre-normal
into Normal mode via
VEN = 5V
pin EN
tnorm
5
20
µs
Time delay for mode
10.3
change from Normal
mode to Sleep mode via
VEN = 0V
pin EN
tsleep
2
7
15
µs
10.4
TXD dominant time out
timer
VTXD = 0V
tdom
5
10
20
ms
10.5
10.6
10.7
11
11.1
11.2
THRec(max) = 0.744 × VS;
THDom(max) = 0.581 × VS;
Duty cycle 1
VS = 7.0V to 18V;
D1
tBit = 50 ms
D1 = tbus_rec(min)/(2 × tBit)
THRec(min) = 0.422 × VS;
THDom(min) = 0.284 × VS;
Duty cycle 2
VS = 7.0V to 18V;
D2
tBit = 50ms
D2 = tbus_rec(max)/(2 × tBit)
Slope time falling and
rising edge at LIN
tSLOPE_fall
tSLOPE_rise
Receiver Electrical AC Parameters of the LIN Physical Layer
LIN Receiver, RXD Load Conditions (CRXD): 20 pF; Rpull-up = 2.4 kΩ
Propagation delay of
receiver Figure 4-4
trec_pd =
max(trx_pdr, trx_pdf)
trx_pd
Symmetry of receiver
propagation delay rising trx_sym = trx_pdr – trx_pdf
edge minus falling edge
trx_sym
0.396
3.5
–2
0.581
22.5
µs
6
µs
+2
µs
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Type*
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
15
4850D–AUTO–02/06
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