ATA6624(2008) 데이터 시트보기 (PDF) - Atmel Corporation
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ATA6624 Datasheet PDF : 29 Pages
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ATA6622/ATA6624/ATA6626
8. Electrical Characteristics (Continued)
5V < VS < 27V, -40°C < Tj < 150°C, unless otherwise specified. All values refer to GND pins
No. Parameters
Test Conditions
Pin Symbol Min.
Typ.
Max.
Time delay for mode
10.5
change from Silent
Mode into Normal Mode
VEN = 5V
via EN
ts_n
5
15
40
10.6 Duty cycle 1
10.7 Duty cycle 2
10.8 Duty cycle 3
10.9 Duty cycle 4
10.10
Slope time falling and
rising edge at LIN
THRec(max) = 0.744 × VS
THDom(max) = 0.581 × VS
VS = 7.0V to 18V
tBit = 50 µs
D1 = tbus_rec(min)/(2 × tBit)
THRec(min) = 0.422 × VS
THDom(min) = 0.284 × VS
VS = 7.6V to 18V
tBit = 50 µs
D2 = tbus_rec(max)/(2 × tBit)
THRec(max) = 0.778 × VS
THDom(max) = 0.616 × VS
VS = 7.0V to 18V
tBit = 96 µs
D3 = tbus_rec(min)/(2 × tBit)
THRec(min) = 0.389 × VS
THDom(min) = 0.251 × VS
VS = 7.6V to 18V
tBit = 96 µs
D4 = tbus_rec(max)/(2 × tBit)
VS = 7.0V to 18V Slope
time dominant and
recessive edges
D1
0.396
D2
D3
0.417
D4
tSLOPE_fall
tSLOPE_rise
3.5
0.581
0.590
22.5
11
Receiver Electrical AC Parameters of the LIN Physical Layer
LIN Receiver, RXD Load Conditions: Internal Pull-up RRXD = 5 kΩ; CRXD = 20 pF
11.1
Propagation delay of
receiver (Figure 8-1 on
page 24)
VS = 7.0V to 18V
trx_pd = max(trx_pdr, trx_pdf)
trx_pd
6
11.2
Symmetry of receiver
propagation delay rising
edge minus falling edge
VS = 7.0V to 18V
trx_sym = trx_pdr – trx_pdf
trx_sym
–2
+2
12 NRES Open Drain Output Pin
12.1
VS ≥ 5.5V
Low-level output voltage Inres = 1 mA
Inres = 250 µA
VNRESL
0.2
0.14
12.2 Low-level output low
10 kΩ to VCC
VCC = 0V
VNRESLL
0.2
12.3
Undervoltage reset time
VVS ≥ 5.5V
CNRES = 20 pF
Treset
2
4
6
12.4
Reset debounce time for VVS ≥ 5.5V
falling edge
CNRES = 20 pF
Tres_f
1.5
10
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Unit
µs
µs
µs
µs
V
V
V
ms
µs
Type*
A
A
A
A
A
A
A
A
A
A
A
A
21
4986F–AUTO–07/08
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