ATA6625 데이터 시트보기 (PDF) - Atmel Corporation
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ATA6625 Datasheet PDF : 24 Pages
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ATA6623/ATA6625
9. Electrical Characteristics (Continued)
5V < VS < 27V, –40°C < Tj < 150°C; unless otherwise specified all values refer to GND pins.
No. Parameters
Test Conditions
Pin Symbol Min.
Typ.
Max.
8.12
Leakage current at
disconnected battery.
Node has to sustain the VBatt disconnected
current that can flow
VSUP_Device = GND
under this condition. Bus 0V < VBUS < 18V
must remain operational
under this condition.
LIN IBUS_NO_bat
0.1
2
8.13
Capacitance on Pin LIN
to GND
LIN
CLIN
20
9 LIN Bus Receiver
9.1
Center of receiver
threshold
VBUS_CNT =
(Vth_dom + Vth_rec)/2
9.2 Receiver dominant state VEN = 5V
9.3 Receiver recessive state VEN = 5V
9.4
Receiver input
hysteresis
Vhys = Vth_rec – Vth_dom
9.5
Pre-wake detection LIN
High level input voltage
LIN
VBUS_CNT
0.475 ×
VS
0.5 ×
VS
0.525 ×
VS
LIN
VBUSdom
–27
0.4 × VS
LIN
VBUSrec 0.6 × VS
40
LIN
VBUShys
0.028 ×
VS
0.1 x VS
0.175 ×
VS
LIN
VLINH
VS – 2V
VS +
0.3V
9.6
Pre-wake detection LIN
Low level input voltage
Activates the LIN receiver
LIN
VLINL
–27
VS – 3.3V
10 Internal Timers
10.1
Dominant time for
wake–up via LIN bus
VLIN = 0V
LIN
tbus
30
90
150
Time delay for mode
10.2
change from Fail-safe
into Normal Mode via pin
VEN = 5V
EN
EN
tnorm
5
20
Time delay for mode
10.3
change from Normal
Mode to Sleep Mode via
VEN = 0V
pin EN
EN
tsleep
2
7
15
10.4
TXD dominant time out
time
VTXD = 0V
TXD
tdom
6
13
20
Time delay for mode
10.5 change from Silent Mode VEN = 5V
into Normal Mode via EN
EN
ts_n
5
15
40
10.6 Duty cycle 1
THRec(max) = 0.744 × VS
THDom(max) = 0.581 × VS
VS = 7.0V to 18V
LIN
D1
tBit = 50 µs
D1 = tbus_rec(min)/(2 × tBit)
10.7 Duty cycle 2
THRec(min) = 0.422 × VS
THDom(min) = 0.284 × VS
VS = 7.6V to 18V
LIN
D2
tBit = 50 µs
D2 = tbus_rec(max)/(2 × tBit)
*) Type means: A = 100% tested, B = 100% correlation tested, C = Charact1
erized on samples, D = Design parameter
0.396
0.581
Unit
µA
pF
V
V
V
V
V
V
µs
µs
µs
ms
µs
Type*
A
D
A
A
A
A
A
A
A
A
A
A
A
A
A
17
4957H–AUTO–05/10
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