AZ100LVEL16VVL 데이터 시트보기 (PDF) - Arizona Microtek, Inc

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AZ100LVEL16VVL

Dual Frequency ECL/PECL Oscillator Gain Stage & Buffer with Enable

Arizona Microtek, Inc 

AZ100LVEL16VV

D0

D1

EN

SEL

Q

Q

QHG

QHG

TIMING DIAGRAM

PINOUTS FOR MLP16 PACKAGE

Q Q NC VCC

16 15 14 13

D0 1

12 SEL

D0 2

D1 3

MLP16

11 QHG

10 QHG

D1 4

9 EN

5 67 8

VBB NC VEE NC

Bottom Center Pad may be left open or tied to VEE

April 2007 * REV - 9

www.azmicrotek.com

6

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