BD6761FS 데이터 시트보기 (PDF) - ROHM Semiconductor
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BD6761FS Datasheet PDF : 23 Pages
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BD6761FS,BD6762FV
Technical Note
●I/O Logic
1)BD6761FS
Forward rotation (F/R=Low)
Input conditions
Pin No.
15
17
19
HU+ HV+ HW+
Condition 1
L
M
H
Condition 2
L
H
H
Condition 3
L
H
M
Condition 4
L
H
L
Condition 5
M
H
L
Condition 6
H
H
L
Condition 7
H
M
L
Condition 8
H
L
L
Condition 9
H
L
M
Condition 10
H
L
H
Condition 11
M
L
H
Condition 12
L
L
H
Reverse rotation (F/R=High)
Input conditions
Pin No.
15
17
19
HU+ HV+ HW+
Condition 1
L
M
H
Condition 2
L
H
H
Condition 3
L
H
M
Condition 4
L
H
L
Condition 5
M
H
L
Condition 6
H
H
L
Condition 7
H
M
L
Condition 8
H
L
L
Condition 9
H
L
M
Condition 10
H
L
H
Condition 11
M
L
H
Condition 12
L
L
H
3
UHG
H
H
H
H
H
PWM
L
L
L
L
L
PWM
3
UHG
L
L
L
L
L
PWM
H
H
H
H
H
PWM
5
VHG
H
PWM
L
L
L
L
L
PWM
H
H
H
H
5
VHG
L
PWM
H
H
H
H
H
PWM
L
L
L
L
Output state
7
4
WHG ULG
L
L
L
L
L
L
PWM L
H
L
H PWM
H
H
H
H
H
H
PWM H
L
H
L PWM
Output state
7
4
WHG ULG
H
H
H
H
H
H
PWM H
L
H
L PWM
L
L
L
L
L
L
PWM L
H
L
H PWM
6
VLG
L
PWM
H
H
H
H
H
PWM
L
L
L
L
6
VLG
H
PWM
L
L
L
L
L
PWM
H
H
H
H
8
WLG
H
H
H
PWM
L
L
L
L
L
PWM
H
H
8
WLG
L
L
L
PWM
H
H
H
H
H
PWM
L
L
＜Input conditions＞
Hall input voltage
H: 3.05V
M: 3.0V
L: 2.95V
＜Output criteria＞
High-side FET gate voltage
L≦1V, VG-1V≦H
Low-side FET gate voltage
L≦1V, 9 V≦H
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8/22
2010.06 - Rev.A
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