Philips Semiconductors
P-channel enhancement mode vertical
D-MOS transistor
Product specification
BST122
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Drain-source voltage
Gate-source voltage (open drain)
Drain current (DC)
Drain current (peak)
Total power dissipation up to Tamb = 25 °C
Storage temperature range
Junction temperature
−VDS
±VGSO
−ID
−IDM
Ptot
Tstg
Tj
max. 60 V
max. 20 V
max. 0.25 A
max. 0.5 A
max.
1W
−65 to + 150 °C
max. 150 °C
THERMAL RESISTANCE
From junction to ambient (note 1)
Rth j-a
=
Note
1. Transistor mounted on a ceramic substrate: area = 2,5 cm2; thickness = 0,7 mm.
125 K/W
April 1995
3