CP2400 데이터 시트보기 (PDF) - Silicon Laboratories

부품명

상세내역

제조사

CP2400

128/64 SEGMENT LCD DRIVER

Silicon Laboratories 

CP2400/1/2/3

Dimension

C1

C2

E

X1

X2

Y1

Y2

Notes:

Table 4.5. PCB Land Pattern

MIN

4.80

4.80

0.50 BSC

0.20

3.20

0.75

3.20

MAX

4.90

4.90

0.30

3.40

0.85

3.40

General

1. All dimensions shown are in millimeters (mm) unless otherwise noted.

2. Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification.

3. This Land Pattern Design is based on the IPC-7351 guidelines.

4. All dimensions shown are at Maximum Material Condition (MMC). Least Material

Condition (LMC) is calculated based on a Fabrication Allowance of 0.05 mm.

Solder Mask Design

1. All metal pads are to be non-solder mask defined (NSMD). Clearance between the

solder mask and the metal pad is to be 60 µm minimum, all the way around the pad.

Stencil Design

1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should

be used to assure good solder paste release.

2. The stencil thickness should be 0.125 mm (5 mils).

3. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.

4. A 3 x 3 array of 1.0 mm square openings on 1.25 mm pitch should be used for the

center ground pad.

Card Assembly

1. A No-Clean, Type-3 solder paste is recommended.

2. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification

for Small Body Components.

Rev. 1.0

31

Share Link: