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CDB5340(2006) 데이터 시트보기 (PDF) - Cirrus Logic

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CDB5340
(Rev.:2006)
Cirrus-Logic
Cirrus Logic Cirrus-Logic
CDB5340 Datasheet PDF : 22 Pages
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CS5340
4.8 Capacitor Size on the Reference Pin (FILT+)
The CS5340 requires an external capacitance on the internal reference voltage pin, FILT+. The size of this
decoupling capacitor will affect the low frequency distortion performance as shown in Figure 22, with larger
capacitor values used to optimize low frequency distortion performance. This plot was taken using the
CDB5340 evaluation platform, with the device running in Single-Speed Mode and VA=VD=VL=5 V.
1 uF
2.2 uF
3.3 uF
4.7 uF
5.6 uF
6.8 uF
10 uF
47 uF
100 uF
22 uF
Figure 22. CS5340 THD+N versus Frequency
DS601F1
19

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