CDB53L21 데이터 시트보기 (PDF) - Cirrus Logic
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CDB53L21 Datasheet PDF : 66 Pages
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ADC DIGITAL FILTER CHARACTERISTICS
CS53L21
Parameter (Note 6)
Passband (Frequency Response)
Passband Ripple
Stopband
Stopband Attenuation
Total Group Delay
High-Pass Filter Characteristics (48 kHz Fs)
Frequency Response
-3.0 dB
-0.13 dB
Phase Deviation
@ 20 Hz
Passband Ripple
Filter Settling Time
to -0.1 dB corner
Min
0
-0.09
0.6
33
-
Typ
-
-
-
-
7.6/Fs
Max
0.4948
0.17
-
-
-
Unit
Fs
dB
Fs
dB
s
-
3.7
-
Hz
-
24.2
-
Hz
-
10
-
Deg
-
-
0.17
dB
-
105/Fs
0
s
6. Response is clock-dependent and will scale with Fs. Note that the response plots (Figures 23 to 26) have
been normalized to Fs and can be de-normalized by multiplying the X-axis scale by Fs. HPF parameters
are for Fs = 48 kHz.
SWITCHING SPECIFICATIONS - SERIAL PORT
(Inputs: Logic 0 = DGND, Logic 1 = VL, SDOUT CLOAD = 15 pF.)
RESET pin Low Pulse Width
MCLK Frequency
MCLK Duty Cycle
Slave Mode
Input Sample Rate (LRCK)
Parameters
LRCK Duty Cycle
SCLK Frequency
SCLK Duty Cycle
LRCK Setup Time Before SCLK Rising Edge
LRCK Edge to SDOUT MSB Output Delay
SDOUT Setup Time Before SCLK Rising Edge
SDOUT Hold Time After SCLK Rising Edge
Symbol
(Note 7)
(Note 8)
Min
1
1.024
45
Quarter-Speed Mode Fs
4
Half-Speed Mode Fs
8
Single-Speed Mode Fs
4
Double-Speed Mode Fs
50
45
1/tP
-
45
ts(LK-SK)
40
td(MSB)
-
ts(SDO-SK)
20
th(SK-SDO)
30
Max
-
38.4
55
Units
ms
MHz
%
12.5
kHz
25
kHz
50
kHz
100
kHz
55
%
64•Fs
Hz
55
%
-
ns
52
ns
-
ns
-
ns
14
DS700PP1
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