CXA2094 데이터 시트보기 (PDF) - Sony Semiconductor

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CXA2094

US Audio Multiplexing Decoder

Sony Semiconductor 

CXA2094Q

Description of Registers

Control registers

Register Number

of bits

ATT

4

SPECTRAL

6

WIDEBAND

6

TEST-DA

1

TEST1

1

FST

1

NRSW

1

FOMO

1

TVSW

1

FEXT1

1

FEXT2

1

EXT

1

M1

1

SMD

1

ATTSW

1

INSW

1

SAPC

1

Classifi-

cation∗1

A

A

A

T

T

T

U

U

U

U

U

U

U

U

S

S

S

Standard

setting

Contents

9

Input level adjustment

1F Adjustment of stereo separation (3kHz)

1F Adjustment of stereo separation (300Hz)

0

Turn to DAC test mode and VCO adjustment mode by means

of TEST-DA = 1.

0

Turn to test mode by means of TEST = 1.

(Adjustment of FILTER)

0

Turn to forced stereo by means of FST = 1.

— Selection of the output signal (Stereo mode, SAP mode)

Turn to forced MONO by means of FOMO = 1.

—

(Left channel only is MONO during SAP output.)

Selection of TV mode or external input mode for TVOUT

0

output

0

External input 1 forced MONO (1: forced MONO ON)

0

External input 2 forced MONO (1: forced MONO ON)

Selection of external input 1 mode or external input 2 mode

0

for TVOUT output. (TVSW = 1)

Selection of TVOUT mute ON/OFF

1

(0: mute ON, 1: mute OFF)

0

Selection of L + R or additional SAP

— Turn the input stage MVCA off when ATTSW = 1.

— Selection of standard input level

Selection of SAP mode or L + R mode according to the

—

presence of SAP broadcasting

∗1 Classification U: User control

A: Adjustment

S: Proper to set

T: Test

Status registers

Register

PONRES

STEREO

SAP

NOISE

Number of bits

Contents

1

POWER ON RESET detection;

1

Stereo discrimination of the COMPIN input signal;

1

SAP discrimination of the COMPIN input signal;

1

Noise level discrimination of the SAP signal;

1: RESET

1: Stereo

1: SAP

1: Noise

– 20 –

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