CY7C1212F 데이터 시트보기 (PDF) - Cypress Semiconductor

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CY7C1212F

1-Mbit (64K x 18) Pipelined Sync SRAM

Cypress Semiconductor 

Switching Waveforms (continued)

ZZ Mode Timing[21, 22]

CLK

t ZZ

ZZ

t ZZI

I SUPPLY

ALL INPUTS

(except ZZ)

I DDZZ

CY7C1212F

t ZZREC

t RZZI

DESELECT or READ Only

Outputs (Q)

High-Z

DON’T CARE

Ordering Information

Speed

(MHz)

Ordering Code

Package

Name

Package Type

Operating

Range

133 CY7C1212F-133AC

A101 100-Lead Thin Quad Flat Pack

Commercial

Please contact your local Cypress Sales representative for availability of the 166-MHz speed grade option.

Notes:

21. Device must be deselected when entering ZZ mode. See Cycle Descriptions table for all possible signal conditions to deselect the device.

22. DQs are in High-Z when exiting ZZ sleep mode.

Document #: 38-05423 Rev. *A

Page 13 of 15

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