DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

DS1624(2015) 데이터 시트보기 (PDF) - Maxim Integrated

부품명
상세내역
제조사
DS1624
(Rev.:2015)
MaximIC
Maxim Integrated MaximIC
DS1624 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
DS1624
Digital Thermometer and Memory
Memory
Byte Program Mode
In this mode, the master sends addresses and one data
byte to the DS1624.
Following a START condition, the device code (4-bit), the
slave address (3-bit), and the R/W bit (which is logic-low)
are placed onto the bus by the master. The master then
sends the Access Memory protocol. This indicates to the
addressed DS1624 that a byte with a word address will fol-
low after it has generated an acknowledge bit. Therefore,
the next byte transmitted by the master is the word address
and will be written into the address pointer of the DS1624.
After receiving the acknowledge of the DS1624, the mas-
ter device transmits the data word to be written into the
addressed memory location. The DS1624 acknowledges
again and the master generates a STOP condition. This
initiates the internal programming cycle of the DS1624. A
repeated START condition, instead of a STOP condition,
will abort the programming operation.
During the programming cycle the DS1624 does not
acknowledge any further accesses to the device until the
programming cycle is complete (no longer than 50ms.)
Page Program Mode
To program the DS1624 the master sends addresses and
data to the DS1624, which is the slave. This is done by
supplying a START condition followed by the 4-bit device
code, the 3-bit slave address, and the R/W bit which
is defined as a logic-low for a write. The master then
sends the Access Memory protocol. This indicates to the
addressed slave that a word address will follow. The slave
outputs the acknowledge pulse to the master during the
ninth clock pulse. When the word address is received
by the DS1624 it is placed in the address pointer defin-
ing which memory location is to be written. The DS1624
generates an acknowledge after every 8 bits received and
store them consecutively in an 8-byte RAM until a STOP
condition is detected which initiates the internal program-
ming cycle.
A repeated START condition, instead of a STOP con-
dition, aborts the programming operation. During the
programming cycle the DS1624 does not acknowledge
any further accesses to the device until the programming
cycle is complete (no longer than 50ms).
If more than 8 bytes are transmitted by the master, the
DS1624 rolls over and overwrites the data beginning with
the first received byte. This does not affect erase/write
cycles of the EEPROM array and is accomplished as a
result of only allowing the address register’s bottom 3 bits
to increment while the upper 5 bits remain unchanged.
The DS1624 is capable of 20,000 writes (25,000 erase/
write cycles) before EEPROM wear out can occur.
If the master generates a STOP condition after trans-
mitting the first data word, byte programming mode is
entered.
Read Mode
In this mode, the master is reading data from the DS1624
E2 memory. The master first provides the slave address
to the device with R/W set to “0.” The master then sends
the Access Memory protocol and, after receiving an
acknowledge, then provides the word address, which is
the address of the memory location at which it wishes to
begin reading. Note that while this is a read operation the
address pointer must first be written. During this period
the DS1624 generates acknowledge bits as defined in the
appropriate section.
The master now generates another START condition and
transmits the slave address. This time the R/W bit is set
to “1” to put the DS1624 in read mode. After the DS1624
generates the acknowledge bit it outputs the data from
the addressed location on the SDA pin, increments the
address pointer, and, if it receives an acknowledge from
the master, transmits the next consecutive byte. This
auto-increment sequence is only aborted when the mas-
ter sends a STOP condition instead of an acknowledge.
When the address pointer reaches the end of the 256-
byte memory space (address FFh) it increments from the
end of the memory back to the first location of the memory
(address 00h).
Command Set
Data and control information is read from and written to
the DS1624 in the format shown in Figure 3. To write
to the DS1624, the master issues the slave address of
the DS1624 and the R/W bit is set to 0. After receiving
an acknowledge the bus master provides a command
protocol. After receiving this protocol the DS1624 issues
an acknowledge, and then the master can send data
to the DS1624. If the DS1624 is to be read, the master
must send the command protocol as before then issue a
repeated START condition and the control byte again, this
time with the R/W bit set to 1 to allow reading of the data
from the DS1624. The command set for the DS1624 as
shown in Table 2 is as follows.
www.maximintegrated.com
Maxim Integrated 9

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]