DS2430 데이터 시트보기 (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS2430

256-Bit 1-Wire™ EEPROM

Dallas Semiconductor -> Maxim Integrated 

NOTES:

1. All voltages are referenced to ground.

DS2430A

2. VPUP=external pullup voltage.

3. Input load is to ground.

4. An additional reset or communication sequence cannot begin until the reset high time has expired.

5. Read data setup time refers to the time the host must pull the 1-Wire bus low to read a bit. Data is

guaranteed to be valid within 1 µs of this falling edge.

6. VIH is a function of the external pullup resistor and VPUP.

7. Capacitance on the data pin could be 800 pF when power is first applied. If a 5 kΩ resistor is used to

pull up the data line to VPUP, 5 µs after power has been applied the parasite capacitance will not affect

normal communications.

8. tRSTL should be limited to maximum 5 ms. Otherwise the DS2430A may perform a power-on reset.

9. Under certain low voltage conditions VILMAX may have to be reduced to as much as 0.5V to always

guarantee a presence pulse.

10. The Copy Scratchpad takes 10 ms maximum, during which the voltage on the 1-Wire bus must not

fall below 2.8V.

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