DS2432 데이터 시트보기 (PDF) - Maxim Integrated

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DS2432

1Kb Protected 1-Wire EEPROM with SHA-1 Engine

Maxim Integrated 

ABRIDGED DATA SHEET

DS2432

WRITING WITH VERIFICATION

To write data to the DS2432, the scratchpad has to be used as intermediate storage. First the master issues

the Write Scratchpad command to specify the desired target address, followed by the data to be written to

the scratchpad. Note that writes to data memory must be performed on 8-byte boundaries with the 3 LSBs

of the target address (T2..T0) equal to 000b. If T2..T0 are sent with non-zero values, the device will set

these bits to zero and will write to the modified address upon completion of the command sequence. In

addition, the entire 8-byte scratchpad will be copied to memory when commanded, therefore eight bytes

of data should be written into the scratchpad to ensure that the data to be copied is known. Under certain

conditions (see the Write Scratchpad command) the master will receive an inverted CRC-16 of the

command, address (actual address sent) and data at the end of the write scratchpad command sequence.

Note that the CRC is calculated based on the actual target address sent and not the modified address in the

case of a non-zero T2..T0. Knowing this CRC value, the master can compare it to the value it has

calculated itself to decide if the communication was successful and proceed to the Copy Scratchpad

command. If the master could not receive the CRC-16, it should send the Read Scratchpad command to

verify data integrity. As preamble to the scratchpad data, the DS2432 repeats the target address TA1 and

TA2 and sends the contents of the E/S register. If the PF flag is set, data did not arrive correctly in the

scratchpad or there was a loss of power since data was last written to the scratchpad. The master does not

need to continue reading; it can start a new trial to write data to the scratchpad. Similarly, a set AA flag

together with a cleared PF flag indicates that the device did not recognize the Write command. If

everything went correctly, both flags are cleared. Now the master can continue reading and verifying

every data byte. After the master has verified the data, it can send the Copy Scratchpad command, for

example. This command must be followed exactly by the data of the three address registers TA1, TA2

and E/S. The master should obtain the contents of these registers by reading the scratchpad.

MEMORY AND SHA-1 FUNCTION COMMANDS

This section describes the commands and flow charts to use the memory and SHA-1 engine of the device.

It includes Tables 1 to 4 and Figure 7. Please refer to the full version of the data sheet.

SHA-1 COMPUTATION ALGORITHM

The SHA-1 computation is adapted from the Secure Hash Standard SHA-1 document as it can be

downloaded from the NIST website (http://www.itl.nist.gov/fipspubs/fip180-1.htm). Further details are

found in the full version of the data sheet.

1-Wire BUS SYSTEM

The 1-Wire bus is a system, which has a single bus master and one or more slaves. In all instances the

DS2432 is a slave device. The bus master is typically a microcontroller. The discussion of this bus system

is broken down into three topics: hardware configuration, transaction sequence, and 1-Wire signaling

(signal types and timing). A 1-Wire protocol defines bus transactions in terms of the bus state during

specific time slots that are initiated on the falling edge of sync pulses from the bus master.

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