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DS3234 데이터 시트보기 (PDF) - Maxim Integrated

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DS3234 Datasheet PDF : 21 Pages
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DS3234
Extremely Accurate SPI Bus RTC
with Integrated Crystal and SRAM
Pin Configuration
TOP VIEW
CS 1
N.C. 2
32kHz 3
VCC 4
INT/SQW 5
RST 6
N.C. 7
N.C. 8
N.C. 9
N.C. 10
DS3234
20 SCLK
19 DOUT
18 SCLK
17 DIN
16 VBAT
15 GND
14 N.C.
13 N.C.
12 N.C.
11 N.C.
SO
Pin Description
PIN
1
2, 7–14
3
4
NAME
CS
N.C.
32kHz
VCC
FUNCTION
Active-Low Chip Select Input. Used to select or deselect the device.
No Connection. Not connected internally. Must be connected to ground.
32kHz Push-Pull Output. If disabled with either EN32kHz = 0 or BB32kHz = 0, the state of the 32kHz pin will be
low.
DC Power Pin for Primary Power Supply. This pin should be decoupled using a 0.1µF to 1.0µF capacitor.
Active-Low Interrupt or Square-Wave Output. This open-drain pin requires an external pullup resistor. It can be
left open if not used. This multifunction pin is determined by the state of the INTCN bit in the Control Register
(0Eh). When INTCN is set to logic 0, this pin outputs a square wave and its frequency is determined by RS2
5 INT/SQW and RS1 bits. When INTCN is set to logic 1, then a match between the timekeeping registers and either of the
alarm registers activates the INT/SQW pin (if the alarm is enabled). Because the INTCN bit is set to logic 1
when power is first applied, the pin defaults to an interrupt output with alarms disabled. The pullup voltage can
be up to 5.5V, regardless of the voltage on VCC. If not used, this pin can be left unconnected.
6
15
16
17
18, 20
19
RST
GND
VBAT
DIN
SCLK
DOUT
Active-Low Reset. This pin is an open-drain input/output. It indicates the status of VCC relative to the
VPF specification. As VCC falls below VPF, the RST pin is driven low. When VCC exceeds VPF, for tRST, the RST
pin is driven high impedance. The active-low, open-drain output is combined with a debounced pushbutton
input function. This pin can be activated by a pushbutton reset request. It has an internal 50k_ nominal value
pullup resistor to VCC. No external pullup resistors should be connected. On first power-up, or if the crystal
oscillator is disabled, tRST is bypassed and RST immediately goes high.
Ground
Backup Power-Supply Input. If VBAT is not used, connect to ground. Diodes placed in series between the VBAT
pin and the battery can cause improper operation. UL recognized to ensure against reverse charging when
used with a lithium battery. Go to www.maximintegrated.com/qa/info/ul.
SPI Data Input. Used to shift address and data into the device.
SPI Clock Input. Used to control timing of data into and out of the device. Either clock polarity can be used. The
clock polarity is determined by the device based on the state of SCLK when CS goes low. Pins 18 and 20 are
electrically connected together internally.
SPI Data Output. Data is output on this pin when the device is in read mode; CMOS push-pull driver.
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