DS4402 데이터 시트보기 (PDF) - Maxim Integrated
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DS4402 Datasheet PDF : 9 Pages
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Two/Four-Channel, I2C Adjustable Current DAC
Applications Information
Example Calculations
for an Adjustable Power Supply
Using the typical circuit, assuming a typical output volt-
age of 2.0V, a feedback voltage of 0.8V, R1 = 500Ω,
and R2 = 333Ω, to adjust or margin the supply 20%
requires a full-scale current equal to [(0.2 x 2.0V) /
500Ω = 800µA]. Using Equation 1, RFS can be calculat-
ed [RFS = (VREF / 800µA) x (31 / 4) = 11.9kΩ]. The cur-
rent DAC in this configuration allows the output voltage
to be stepped linearly from 1.6V to 2.4V using 63 set-
tings. This corresponds to a resolution of 12.7mV/step.
Power-Supply Feedback Voltage
The feedback voltage for adjustable power supplies
must be between 0.5V and VCC - 0.5V for the DS4402/
DS4404 to properly sink/source currents for adjusting
the voltage.
I2C Reset on Address Change
In addition to defining the I2C slave address, the DS4402/
DS4404 address select inputs have an alternate function.
Changing the address select inputs resets the I2C inter-
face. This function aborts the current transaction and puts
the SDA driver into a high-impedance state. This hard-
ware reset function should never be required because it
is achievable through software, but it does provide an
alternative way of resetting the I2C interface, if needed.
VCC Decoupling
To achieve the best results when using the DS4402/
DS4404, decouple the power supply with a 0.01µF or
0.1µF capacitor. Use a high-quality ceramic surface-
mount capacitor if possible. Surface-mount compo-
nents minimize lead inductance, which improves
performance, and ceramic capacitors tend to have
adequate high-frequency response for decoupling
applications.
Layout Considerations
Care should be taken to ensure that traces underneath
the DS4402/DS4404 do not short with the exposed pad.
The exposed pad should be connected to the signal
ground, or can be left unconnected.
TYPICAL I2C WRITE TRANSACTION
MSB
LSB
MSB
LSB
MSB
LSB
START a7 a6 a5 a4 a3 a2 a1 R/W SLAVE b7 b6 b5 b4 b3 b2 b1 b0 SLAVE b7 b6 b5 b4 b3 b2 b1 b0 SLAVE STOP
ACK
ACK
ACK
SLAVE
ADDRESS*
READ/
WRITE
REGISTER/MEMORY ADDRESS
DATA
*THE SLAVE ADDRESS IS DETERMINED BY ADDRESS PINS A0 AND A1 (SEE TABLE 1).
EXAMPLE I2C TRANSACTIONS (WHEN A0 AND A1 ARE N.C.)
A) SINGLE BYTE WRITE
-WRITE RESISTOR
F9h TO 00h
A0h
F9h
START 1 0 1 0 0 0 0 0 SLAVE 1 1 1 1 1 0 0 1 SLAVE 0 0 0 0 0 0 0 0 SLAVE
ACK
ACK
ACK
STOP
A0h
F8h
A1h
DATA
B) SINGLE BYTE READ
-READ RESISTOR F8h
START
1 0100000
SLAVE
ACK
11111 000
SLAVE
ACK
REPEATED 1 0 1 0 0 0 0 1 SLAVE
START
ACK
MASTER
NACK
STOP
Figure 4. I2C Communication Examples
Chip Information
TRANSISTOR COUNT: 10,992
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
14 TDFN-EP
T1433+1
21-0137
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