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HUFA75309T3ST 데이터 시트보기 (PDF) - Fairchild Semiconductor

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HUFA75309T3ST
Fairchild
Fairchild Semiconductor Fairchild
HUFA75309T3ST Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
HUFA75309T3ST
Test Circuits and Waveforms (Continued)
VDS
RL
VGS
RGS
DUT
+
VDD
-
VGS
FIGURE 18. SWITCHING TIME TEST CIRCUIT
Thermal Resistance vs. Mounting Pad Area
The maximum rated junction temperature, TJ(MAX), and the
thermal resistance of the heat dissipating path determines
the maximum allowable device power dissipation, PD(MAX),
in an application. Therefore the application’s ambient
temperature, TA (oC), and thermal impedance RθJA (oC/W)
must be reviewed to ensure that TJ(MAX) is never exceeded.
Equation 1 mathematically represents the relationship and
serves as the basis for establishing the rating of the part.
PD(MAX)
=
-(--T----J---(---M-----A-----X----)----–----T----A-----)
RθJA
(EQ. 1)
In using surface mount devices such as the SOT-223
package, the environment in which it is applied will have a
significant influence on the part’s current and maximum
power dissipation ratings. Precise determination of the
PD(MAX) is complex and influenced by many factors:
1. Mounting pad area onto which the device is attached and
whether there is copper on one side or both sides of the
board.
2. The number of copper layers and the thickness of the
board.
3. The use of external heat sinks.
4. The use of thermal vias.
5. Air flow and board orientation.
6. For non steady state applications, the pulse width, the
duty cycle and the transient thermal response of the part,
the board and the environment they are in.
Fairchild provides thermal information to assist the
designer’s preliminary application evaluation. Figure 20
defines the RθJA for the device as a function of the top
copper (component side) area. This is for a horizontally
positioned FR-4 board with 1oz copper after 1000 seconds
of steady state power with no air flow.This graph provides
the necessary information for calculation of the steady state
junction temperature or power dissipation. Pulse applications
©2001 Fairchild Semiconductor Corporation
VDS
tON
td(ON)
tr
90%
tOFF
td(OFF)
tf
90%
10%
0
10%
VGS
10%
0
50%
PULSE WIDTH
90%
50%
FIGURE 19. RESISTIVE SWITCHING WAVEFORMS
can be evaluated using the Fairchildl device Spice thermal
model or manually utilizing the normalized maximum
transient thermal impedance curve.
200
RθJA = 77.6 - 17.9 * ln(AREA)
143oC/W - 0.026in2
150
126oC/W - 0.068in2
110oC/W - 0.164in2
100
50
0.01
0.1
1.0
AREA, TOP COPPER AREA (in2)
FIGURE 20. THERMAL RESISTANCE vs MOUNTING PAD
AREA
Displayed on the curve are the three RθJA values listed in
the Electrical Specifications table. The three points were
chosen to depict the compromise between the copper board
area, the thermal resistance and ultimately the power
dissipation, PD(MAX). Thermal resistances corresponding to
other component side copper areas can be obtained from
Figure 20 or by calculation using Equation 2. The area, in
square inches is the top copper area including the gate and
source pads.
RθJA = 77.6 17.9 × ln (Area)
(EQ. 2)
HUFA75309T3ST Rev. B

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