EL5420T 데이터 시트보기 (PDF) - Intersil

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EL5420T

12MHz Rail-to-Rail Input-Output Operational Amplifier

Intersil 

EL5420T

ON the outputs by putting them in a low impedance (normal)

operating state.

Driving Capacitive Loads

As load capacitance increases, the -3dB bandwidth will

decrease and peaking can occur. Depending on the

application, it may be necessary to reduce peaking and to

improve device stability. To improve device stability a

snubber circuit or a series resistor may be added to the

output of the EL5420T.

A snubber is a shunt load consisting of a resistor in series

with a capacitor. An optimized snubber can improve the

phase margin and the stability of the EL5420T. The

advantage of a snubber circuit is that it does not draw any

DC load current or reduce the gain.

Another method to reduce peaking is to add a series output

resistor (typically between 1Ω to 10Ω). Depending on the

capacitive loading, a small value resistor may be the most

appropriate choice to minimize any reduction in gain.

Power Dissipation

With the high-output drive capability of the EL5420T

amplifiers, it is possible to exceed the +150°C absolute

maximum junction temperature under certain load current

conditions. It is important to calculate the maximum power

dissipation of the EL5420T in the application. Proper load

conditions will ensure that the EL5420T junction temperature

stays within a safe operating region.

The maximum power dissipation allowed in a package is

determined according to Equation 1:

PDMAX

=

T----J---M-----A----X-----–-----T----A---M-----A----X--

θJA

(EQ. 1)

where:

• TJMAX = Maximum junction temperature

• TAMAX = Maximum ambient temperature

• ΘJA = Thermal resistance of the package

• PDMAX = Maximum power dissipation allowed

The total power dissipation produced by an IC is the total

quiescent supply current times the total power supply

voltage, plus the power dissipation in the IC due to the loads,

or:

PDMAX = Σi[VS × ISMAX + (VS+ – VOUTi ) × ILOADi ]

(EQ. 2)

when sourcing, and:

PDMAX = Σi[VS × ISMAX + (VOUTi – VS- ) × ILOADi ]

(EQ. 3)

when sinking,

where:

• i = 1 to 4

(1, 2, 3, 4 corresponds to Channel A, B, C, D respectively)

• VS = Total supply voltage (VS+ - VS-)

• VS+ = Positive supply voltage

• VS- = Negative supply voltage

• ISMAX = Maximum supply current per amplifier

(ISMAX = EL5420T quiescent current ÷ 4)

• VOUT = Output voltage

• ILOAD = Load current

Device overheating can be avoided by calculating the

minimum resistive load condition, RLOAD, resulting in the

highest power dissipation. To find RLOAD set the two PDMAX

equations equal to each other and solve for VOUT/ILOAD.

Reference the package power dissipation curves, Figures 30

and 31, for further information.

JEDEC JESD51-3 LOW EFFECTIVE THERMAL

CONDUCTIVITY TEST BOARD

1.2

1.04W

1.0

962mW

0.8 833mW

0.6

SOIC14

θJA = 120°C/W

QFN16

θJA = 130°C/W

0.4

0.2

0.0

0

TSSOP14

θJA = 150°C/W

25

50

75 85 100

125

150

Am bie nt Te m pe ra ture (°C)

FIGURE 30. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

JEDEC JESD51-7 HIGH EFFECTIVE THERMAL

3.0

2.66W

2.5

2.0

1.5 1.42W

1.0 1.25W

0.5

QFN16

θJA = 47°C/W

SOIC14

θJA = 88°C/W

TSSOP14

θJA = 100°C/W

0.0

0

25

50

75 85 100

125

150

Am bie nt Te m pe ra ture (°C)

FIGURE 31. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

13

FN6838.0

September 25, 2009

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