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FAN7093 데이터 시트보기 (PDF) - Fairchild Semiconductor

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FAN7093
Fairchild
Fairchild Semiconductor Fairchild
FAN7093 Datasheet PDF : 14 Pages
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Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. TJ = -40°C to +150°C; all voltages with respect to ground, and
positive current flowing into pin (unless otherwise specified).
Symbol
Parameter
VBATT
VIN /VINH
VSR
VIS
Supply Voltage(4)
Logic Input Voltage(4)
Voltage at SR Pin(4)
Voltage at IS Pin(4)
ID(HS),
ID(LS)
HS/LS Continuous Drain Current(4,5)
ID(HS),
ID(LS)
HS/LS Pulsed Drain Current(4,5)
ID(HS),
ID(LS)
HS/LS PWM Current(4,5)
Temperatures
TJ
TSTG
Junction Temperature(4)
Storage Temperature(4)
Electrostatic Discharge Capability (ESD)
Condition
TC < 85°C
TC < 85°C Single Pulse <
5 µs
TC < 125°C f=1 kHz,
DC=50%
Min.
-0.3
-0.3
-0.3
-0.3
Typ.
-46/46
-90/90
-55/55
-40
-55
ESD Human Body Model, JESD22-A114(6) IN, /INH, SR, IS
-2
OUT, GND, VBATT
-6
Notes:
4. Not subject to production testing, specified by design.
5. Maximum reachable current may be smaller, depending on current-limit level.
6. ESD susceptibility, HBM according to AEC_Q100-0042 / JESD22-A114-B (1.5 kΩ, 100 pF).
Max.
45
45
1.5
7.5
150
150
2
6
Unit
V
V
V
V
A
A
A
°C
°C
kV
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
VBATT(NOM) Supply Voltage Range for Nominal Operation
VBATT(EXT) Supply Voltage Range for Extended Operation
TJ
ϴJC(LS)
ϴJC(HS)
Junction Temperature
Thermal Resistance, Junction-Case, Low-Side
Switch ϴJC(LS)=TJ (LS) / PV (LS)(7)
Thermal Resistance, Junction-Case, High-Side
Switch ϴJC(HS)=TJ (HS) / PV (HS)(7)
ϴJA Thermal Resistance, Junction-Ambient(7)
Note:
7. Not subject to production test; specified by design.
Condition
Min.
7
Parameter
Deviations Possible
5.5
-40
Typ.
Max.
18
28.0
150
Unit
V
V
°C
0.8
°C/W
0.45
Using Pad Area of
One Square Inch of
40
Two-Ounce Copper
°C/W
°C/W
© 2010 Fairchild Semiconductor Corporation
FAN7093 Rev. 1.0.6
4
www.fairchildsemi.com

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