FQD5N50CTM_F080 데이터 시트보기 (PDF) - Fairchild Semiconductor
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FQD5N50CTM_F080 Datasheet PDF : 9 Pages
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FQD5N50C / FQU5N50C
500V N-Channel MOSFET
October 2008
QFET®
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction, electronic lamp ballasts
based on half bridge topology.
Features
• 4.0A, 500V, RDS(on) = 1.4 Ω @VGS = 10 V
• Low gate charge ( typical 18nC)
• Low Crss ( typical 15pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• RoHS Compliant
D
D
!
D-PAK
G S FQD Series
GDS
I-PAK
FQU Series
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TA = 25°C)*
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
G!
●
◀▲
●
●
!
S
FQD5N50C / FQU5N50C
500
4
2.4
16
± 30
300
4
4.8
4.5
2.5
48
0.38
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Thermal Characteristics
Symbol
Parameter
RθJC
Thermal Resistance, Junction-to-Case
RθJA
Thermal Resistance, Junction-to-Ambient *
RθJA
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
Typ
Max
Units
-
2.6
°C/W
-
50
°C/W
-
110
°C/W
©2008 Fairchild Semiconductor Internationa
Rev. A1, October 2008
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