DM0465RS 데이터 시트보기 (PDF) - Fairchild Semiconductor
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DM0465RS Datasheet PDF : 19 Pages
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greater than the AOCP level, the set signal is applied to
the latch, resulting in the shutdown of the SMPS.
2.5R
R
OSC
SQ
RQ
Gate
driver
LEB
AOCP protection
2 GND
VCL
FSDM0465RS Rev: 00
Figure 21. Abnormal Over-Current Protection
4. Soft-Start: The FSDM0465RS has an internal soft-
start circuit that increases PWM comparator inverting
input voltage together with the SenseFET current slowly
after it starts up. The typical soft-start time is 10ms. The
pulse width to the power switching device is
progressively increased to establish the correct working
conditions for transformers, inductors, and capacitors.
The voltage on the output capacitors is progressively
increased with the intention of smoothly establishing the
required output voltage. It helps prevent transformer
saturation and reduces the stress on the secondary
diode during startup.
Vo
Voset
VFB
0.7V
0.5V
Ids
Vds
Switching
Switching
FSDM0465RS Rev: 00 T1
disabled
T2 T3
disabled
T4
time
Figure 22. Waveforms of Burst Operation
5. Burst Operation: To minimize power dissipation in
standby mode, the FSDM0465RS enters burst mode
operation. As the load decreases, the feedback voltage
decreases. As shown in Figure 22, the device
automatically enters burst mode when the feedback
voltage drops below VBURL(500mV). At this point
switching stops and the output voltages start to drop at a
rate dependent on standby current load. This causes the
feedback voltage to rise. Once it passes VBURH(700mV)
switching resumes. The feedback voltage then falls and
the process repeats. Burst mode operation alternately
enables and disables switching of the power SenseFET
thereby reducing switching loss in standby mode.
© 2008 Fairchild Semiconductor Corporation
FSDM0465RS Rev. 1.0.1
13
www.fairchildsemi.com
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