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PEB2465H 데이터 시트보기 (PDF) - Infineon Technologies

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PEB2465H
Infineon
Infineon Technologies Infineon
PEB2465H Datasheet PDF : 103 Pages
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1.3
Pin Definition and Functions
SICOFI-4
PEB 2465
General Description
Table 1
Pin Definition and Functions
Pin No. Symbol Input (I) Function
Output (O)
Common Pins for All Channels
23
VDDD
I
+ 5 V supply for the digital circuitry 1)
58
GNDD I
Ground Digital, not internally connected to
GNDA 1, 2, 3, 4
All digital signals are referred to this pin
40
VDDA12 I
9
VDDA34 I
+ 5 V Analog supply voltage for channel 1 and 2 1)
+ 5 V Analog supply voltage for channel 3 and 4 1)
27
FSC
I
IOM-2: Frame synchronization clock , 8 kHz
26
DCL
I
IOM-2: Data clock, 2048 kHz or 4096 kHz depending
on MODE
25
DU
O
IOM-2: Data upstream, open drain output
24
DD
I
IOM-2: Data downstream, input
22
RESET I
Reset input - forces the device to the default mode,
active high
57
MODE I
IOM-2: Mode Selection
60
TSS0 I
IOM-2: Time slot selection pin 0
59
TSS1 I
IOM-2: Time slot selection pin 1
56
TCK
I
Boundary scan: Test Clock
55
TMS
I
Boundary scan: Test Mode Select
54
TDI
I
Boundary scan: Test Data Input
53
TDO
O
Boundary scan: Test Data Output
28
LGKM0 O
Loop/Ground Key Multiplexing output 0 for
channel 1, 2
21
LGKM1 O
Loop/Ground Key Multiplexing output 1 for
channel 3, 4
41
VH12
I/O
8
VH34
I/O
Reference voltage for channel 1 and 2, has to be
connected via a 220 nF cap. to ground
Reference voltage for channel 3 and 4, has to be
connected via a 220 nF cap. to ground
1) A 100 nF cap. should be used for blocking these pins, see also on Page 75.
Data Sheet
13
2000-02-08

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