GS84118AT 데이터 시트보기 (PDF) - Giga Semiconductor

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GS84118AT

256K x 18 Sync Cache Tag

Giga Semiconductor 

Pipeline Mode Timing

GS84118AT/B-166/150/130/100

Begin

Read A Cont

Single Read

Cont

CK

Deselect Write B

Single Write

tKL

tKH

tKC

Read C

Read C+1 Read C+2 Read C+3 Cont

Burst Read

Deselect

ADSP

ADSC

ADV

A0–An

GW

BW

Ba–Bd

E1

E2

E3

tS

tH

tS

tS

tH

A

tS

tS

tS

tS

tH

tS

tH

ADSC initiated read

tH

B

C

tH

tH

tS

tH

E1 masks ADSP

E2 and E3 only sampled with ADSP and ADSC

Deselected with E1

G

DQa–DQd

tOE

tOHZ

Q(A)

tS

tH

D(B)

tKQ

tLZ

Q(C)

Q(C+1)

Q(C+2)

tKQX

tHZ

Q(C+3)

Rev: 1.02 4/2005

13/20

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

© 2001, GSI Technology

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