HD4043312 데이터 시트보기 (PDF) - Hitachi -> Renesas Electronics

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HD4043312

4-bit HMCS400-Series microcomputer

Hitachi -> Renesas Electronics 

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,HD404339Series

In stop mode, the system oscillator is stopped. To ensure a proper oscillation stabilization period of at least

tRC when clearing stop mode, execute the cancellation according to the timing chart in figure 12.

In watch and subactive modes, a timer A or INT0 interrupt can be accepted during the interrupt frame

period T (see figure 13).

Note:

In watch and subactive modes, an interrupt will not be properly detected if the INT0 high or low

level period is shorter than the interrupt frame period T. Thus, when operating in watch and

subactive modes, maintain the INT0 high or low level period longer than period T to ensure

interrupt detection.

Oscillator

Internal

clock

Stop mode

RESET

or

STOPC

STOP instruction execution

tres

tres ≥ tRC (stabilization period)

Figure 12 Timing of Stop Mode Cancellation

Active mode

Watch mode

Oscillation

stabilization

period

Active mode

Interrupt strobe

INT0

Interrupt request

generation

(During the transition

from watch mode to

active mode only)

T

T

t RC

Tx

T + tRC ≤ TX ≤ 2T + tRC

T: Interrupt frame length

t RC : Oscillation stabilization period

Figure 13 Interrupt Frame

21

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