HM6264BI 데이터 시트보기 (PDF) - Hitachi -> Renesas Electronics

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HM6264BI

64k SRAM (8-kword × 8-bit) Wide Temperature Range version

Hitachi -> Renesas Electronics 

Revision Record

Rev.

0.0

1.0

2.0

Date

Dec. 1, 1995

Sep. 5, 1996

Feb. 9, 1998

3.0 May. 8, 2000

Contents of Modification

Initial issue

Deletion of Preliminary

Change of subtitle

Change of FP-28DA

Low VCC Data Retention Characteristics

Note 2: VIL min = −0.3 V to

10 µA max at Ta = –40 to + 40°C

HM6264BI Series

Drawn by

I. Ogiwara

I. Ogiwara

I. Ogiwara

Approved by

K. Yoshizaki

K. Imato

K. Imato

17

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