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HT48RA0-1 데이터 시트보기 (PDF) - Holtek Semiconductor

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HT48RA0-1
Holtek
Holtek Semiconductor Holtek
HT48RA0-1 Datasheet PDF : 33 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
HT48RA0-1/HT48CA0-1
Bit No.
0
1
2
3
4
5
6~7
Label
C
AC
Z
OV
PDF
TO
¾
Function
C is set if the operation results in a carry during an addition operation or if a borrow does not
take place during a subtraction operation; otherwise C is cleared. C is also affected by a ro-
tate through carry instruction.
AC is set if the operation results in a carry out of the low nibbles in addition or no borrow from
the high nibble into the low nibble in subtraction; otherwise AC is cleared.
Z is set if the result of an arithmetic or logic operation is zero; otherwise Z is cleared.
OV is set if the operation results in a carry into the highest-order bit but not a carry out of the
highest-order bit, or vice versa; otherwise OV is cleared.
PDF is cleared when either a system power-up or executing the CLR WDT instruction. PDF
is set by executing the HALT instruction.
TO is cleared by a system power-up or executing the CLR WDT or HALT instruction. TO is
set by a WDT time-out.
Unused bit, read as ²0²
Status (0AH) Register
Oscillator Configuration
There are two oscillator circuits implemented in the
microcontroller.
O SC1
O SC1
O SC2
C r y s ta l O s c illa to r
fS Y S /4
(N M O S o p e n
d r a in o u tp u t)
O SC2
R C O s c illa to r
System Oscillator
Both are designed for system clocks; the RC oscillator
and the Crystal oscillator, which are determined by code
options. No matter what oscillator type is selected, the
signal provides the system clock. The HALT mode stops
the system oscillator and ignores the external signal to
conserve power.
If an RC oscillator is used, an external resistor between
OSC1 and VSS in needed and the resistance must
range from 51kW to 1MW. The system clock, divided by
4, is available on OSC2, which can be used to synchro-
nize external logic. The RC oscillator provides the most
cost effective solution. However, the frequency of the
oscillation may vary with VDD, temperature and the chip
itself due to process variations. It is, therefore, not suit-
able for timing sensitive operations where accurate os-
cillator frequency is desired.
If the Crystal oscillator is used, a crystal across OSC1
and OSC2 is needed to provide the feedback and phase
shift for the oscillator. No other external components are
needed. Instead of a crystal, the resonator can also be
connected between OSC1 and OSC2 to get a frequency
reference, but two external capacitors in OSC1 and
OSC2 are required.
Watchdog Timer - WDT
The clock source of the WDT is implemented by instruc-
tion clock (system clock divided by 4). The clock source
is processed by a frequency divider and a prescaller to
yield various time out periods.
Clock Source
WDT time out period =
2n
Where n= 8~11 selected by code option.
C lo c k S o u r c e
( S y s te m C lo c k /4 )
F r e q u e n c y D iv id e r
3 - b it C o u n te r
C le a r W D T
P r e s c a lle r
( 8 - b it)
C o d e O p tio n
S e le c t
C ode
O p tio n
W DT
T im e - o u t
C lo c k S o u r c e
2n
(n = 8 ~ 1 1 )
Watchdog Timer
Rev. 1.40
7
December 21, 2005

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