HT46R65-56 데이터 시트보기 (PDF) - Holtek Semiconductor
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HT46R65-56 Datasheet PDF : 48 Pages
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HT46R65/HT46C65
Timer/Event Counter
Two timer/event counters (TMR0,TMR1) are imple-
mented in the microcontroller. The Timer/Event Counter
0 contains a 16-bit programmable count-up counter and
the clock may come from an external source or an inter-
nal clock source. An internal clock source comes from
fSYS. The Timer/Event Counter 1 contains a 16-bit pro-
grammable count-up counter and the clock may come
from an external source or an internal clock source. An
internal clock source comes from fSYS/4 or 32768Hz se-
lected by option. The external clock input allows the
user to count external events, measure time intervals or
pulse widths, or to generate an accurate time base.
There are six registers related to the Timer/Event Coun-
ter 0; TMR0H (0CH), TMR0L (0DH), TMR0C (0EH) and
the Timer/Event Counter 1; TMR1H (0FH), TMR1L
(10H), TMR1C (11H). Writing TMR0L (TMR1L) will only
put the written data to an internal lower-order byte buffer
(8-bit) and writing TMR0H (TMR1H) will transfer the
specified data and the contents of the lower-order byte
buffer to TMR0H (TMR1H) and TMR0L (TMR1L) regis-
ters, respectively. The Timer/Event Counter 1/0 preload
register is changed by each writing TMR0H (TMR1H)
operations. Reading TMR0H (TMR1H) will latch the
contents of TMR0H (TMR1H) and TMR0L (TMR1L)
counters to the destination and the lower-order byte
buffer, respectively. Reading the TMR0L (TMR1L) will
read the contents of the lower-order byte buffer. The
TMR0C (TMR1C) is the Timer/Event Counter 0 (1) con-
trol register, which defines the operating mode, counting
enable or disable and an active edge.
The T0M0, T0M1 (TMR0C) and T1M0, T1M1 (TMR1C)
bits define the operation mode. The event count mode is
used to count external events, which means that the
clock source is from an external (TMR0, TMR1) pin. The
timer mode functions as a normal timer with the clock
source coming from the internal selected clock source.
Finally, the pulse width measurement mode can be used
to count the high or low level duration of the external sig-
nal (TMR0, TMR1), and the counting is based on the in-
ternal selected clock source.
In the event count or timer mode, the timer/event coun-
ter starts counting at the current contents in the
timer/event counter and ends at FFFFH. Once an over-
PW M
(6 + 2 ) o r (7 + 1 )
C o m p a re
T o P D 0 /P D 1 /P D 2 /P D 3 c ir c u it
fS Y S
8 - s ta g e P r e s c a le r
fIN T
8 -1 M U X
T0P S C 2~T0P S C 0 TM R 0
T0M 1
T0M 0
T0E
L o w B y te
B u ffe r
1 6 - B it
P r e lo a d R e g is te r
D a ta B u s
R e lo a d
T0M 1
T0M 0
T0O N
P u ls e W id th
M e a s u re m e n t
M o d e C o n tro l
H ig h B y te L o w B y te
1 6 - B it T im e r /E v e n t C o u n te r
PFD 0
O v e r flo w to In te r r u p t
Timer/Event Counter 0
D a ta B u s
fS Y S /4
M
U
32768H z X
T1S
f IN T
TM R 1
T1M 1
T1M 0
T1E
L o w B y te
B u ffe r
1 6 - B it
P r e lo a d R e g is te r
R e lo a d
T1M 1
T1M 0
T1O N
P u ls e W id th
M e a s u re m e n t
M o d e C o n tro l
H ig h B y te L o w B y te
1 6 - B it T im e r /E v e n t C o u n te r
PFD 1
Timer/Event Counter 1
O v e r flo w to In te r r u p t
PFD 0
PFD 1
M
U
1 /2
PFD
X
P A 3 D a ta C T R L
P F D S o u r c e O p tio n
PFD Source Option
Rev. 1.80
17
July 14, 2005
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