HT46R65-56 데이터 시트보기 (PDF) - Holtek Semiconductor
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HT46R65-56 Datasheet PDF : 48 Pages
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HT46R65/HT46C65
PWM
The microcontroller provides 4 channels (6+2)/(7+1)
(dependent on options) bits PWM output shared with
PD0/PD1/PD2/PD3. The PWM channels have their data
registers denoted as PWM0 (1AH), PWM1 (1BH),
PWM2 (1CH) and PWM3 (1DH). The frequency source
of the PWM counter comes from fSYS. The PWM regis-
ters are four 8-bit registers. The waveforms of PWM out-
puts are as shown. Once the PD0/PD1/PD2/PD3 are
selected as the PWM outputs and the output function of
PD0/PD1/PD2/PD3 are enabled (PDC.0/PDC.1/
PDC.2/PDC.3=²0²), writing ²1² to PD0/PD1/PD2/PD3
data register will enable the PWM output function and
writing ²0² will force the PD0/PD1/PD2/PD3 to stay at
²0².
A (6+2) bits mode PWM cycle is divided into four modu-
lation cycles (modulation cycle 0~modulation cycle 3).
Each modulation cycle has 64 PWM input clock period.
In a (6+2) bit PWM function, the contents of the PWM
register is divided into two groups. Group 1 of the PWM
register is denoted by DC which is the value of
PWM.7~PWM.2. The group 2 is denoted by AC which is
the value of PWM.1~PWM.0.
In a (6+2) bits mode PWM cycle, the duty cycle of each
modulation cycle is shown in the table.
Parameter
Modulation cycle i
(i=0~3)
AC (0~3)
i<AC
i³AC
Duty Cycle
DC + 1
64
DC
64
A (7+1) bits mode PWM cycle is divided into two modu-
lation cycles (modulation cycle0~modulation cycle 1).
Each modulation cycle has 128 PWM input clock period.
In a (7+1) bits PWM function, the contents of the PWM
register is divided into two groups. Group 1 of the PWM
register is denoted by DC which is the value of
PWM.7~PWM.1. The group 2 is denoted by AC which is
the value of PWM.0.
fS Y S /2
[P W M ] = 1 0 0
PW M
2 5 /6 4
2 5 /6 4
2 5 /6 4
[P W M ] = 1 0 1
PW M
2 6 /6 4
2 5 /6 4
2 5 /6 4
[P W M ] = 1 0 2
PW M
2 6 /6 4
2 6 /6 4
2 5 /6 4
[P W M ] = 1 0 3
PW M
2 6 /6 4
2 6 /6 4
2 6 /6 4
P W M m o d u la tio n p e r io d : 6 4 /fS Y S
M o d u la tio n c y c le 0
M o d u la tio n c y c le 1
M o d u la tio n c y c le 2
P W M c y c le : 2 5 6 /fS Y S
2 5 /6 4
2 5 /6 4
2 5 /6 4
2 5 /6 4
M o d u la tio n c y c le 3
fS Y S /2
[P W M ] = 1 0 0
PW M
[P W M ] = 1 0 1
PW M
[P W M ] = 1 0 2
PW M
[P W M ] = 1 0 3
PW M
(6+2) PWM Mode
5 0 /1 2 8
5 1 /1 2 8
5 1 /1 2 8
5 2 /1 2 8
P W M m o d u la tio n p e r io d : 1 2 8 /fS Y S
M o d u la tio n c y c le 0
P W M c y c le : 2 5 6 /fS Y S
5 0 /1 2 8
5 0 /1 2 8
5 1 /1 2 8
5 1 /1 2 8
M o d u la tio n c y c le 1
(7+1) PWM Mode
2 5 /6 4
2 6 /6 4
2 6 /6 4
2 6 /6 4
M o d u la tio n c y c le 0
5 0 /1 2 8
5 1 /1 2 8
5 1 /1 2 8
5 2 /1 2 8
M o d u la tio n c y c le 0
Rev. 1.80
21
July 14, 2005
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