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HT82V26A 데이터 시트보기 (PDF) - Holtek Semiconductor

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HT82V26A
Holtek
Holtek Semiconductor Holtek
HT82V26A Datasheet PDF : 17 Pages
First Prev 11 12 13 14 15 16 17
HT82V26A
Application Circuits
The recommended circuit configuration for the 3-channel CDS mode operation is shown in the figure below. The rec-
ommended input coupling capacitor value is 0.1mF.
A single ground plane is recommended for the HT82V26A. A separate power supply may be used for DRVDD, the digi-
tal driver supply, but this supply pin should still be decoupled to the same ground plane as with the rest of the
HT82V26A. The loading of the digital outputs should be minimized, either by using short traces to the digital ASIC, or by
using external digital buffers. To minimize the effect of digital transients during major output code transitions, the falling
edge of the CDSCLK2 should occur in coincidence with or before the rising edge of ADCCLK. All 0.1mF decoupling ca-
pacitors should be located as close as possible to the HT82V26A pins. When operating in a single channel mode, the
unused analog inputs should be grounded.
C lo c k
In p u ts
5 V /3 V
D a ta
In p u ts
V DD
1 C D S C LK 1
2 C D S C LK 2
3 A D C C LK
4 OE
5 DRVDD
6 DRVSS
7 D 7 (M S B )
8 D6
9 D5
10 D 4
11 D 3
12 D 2
13 D 1
1 4 D 0 (L S B )
A V D D 28
A V S S 27
V IN R 2 6
O FFS E T 25
V IN G 2 4
C M L 23
V IN B 2 2
R E FT 21
R E FB 20
A V S S 19
A V D D 18
S LO A D 17
S C LK 16
S D A TA 15
H T 8 2 V 2 6 A (C D S M o d e )
0 .1 m F
0 .1 m F
0 .1 m F
0 .1 m F
0 .1 m F
0 .1 m F
R e d In p u t
G re e n In p u t
B lu e In p u t
1 .0 m F
0 .1 m F
0 .1 m F 1 0 m F 0 .1 m F
0 .1 m F
5V
S e r ia l
In p u ts
C lo c k
In p u ts
5 V /3 V
D a ta
In p u ts
1 C D S C LK 1
2 C D S C LK 2
3 A D C C LK
4 OE
5 DRVDD
6 DRVSS
7 D 7 (M S B )
8 D6
9 D5
10 D 4
11 D 3
12 D 2
13 D 1
1 4 D 0 (L S B )
A V D D 28
A V S S 27
V IN R 2 6
O FFS E T 25
V IN G 2 4
C M L 23
V IN B 2 2
R E FT 21
R E FB 20
A V S S 19
A V D D 18
S LO A D 17
S C LK 16
S D A TA 15
H T 8 2 V 2 6 A (S H A M o d e )
V DD
0 .1 m F
0 .1 m F
R e d In p u t
G re e n In p u t
B lu e In p u t
D C Level
0 .1 m F
0 .1 m F 1 0 m F 0 .1 m F
0 .1 m F
5V
S e r ia l
In p u ts
Note:
For the 3-channel SHA mode, all of the above considerations also apply for this configuration, except that the
analog input signals are directly connected to the HT82V26A without the use of coupling capacitors. The OFF-
SET pin should be grounded if the inputs to the HT82V26A are to be referenced to ground, or a DC offset volt-
age should be applied to the OFFSET pin in the case where a coarse offset needs to be removed from the
inputs. The analog input signals must already be dc-biased between 0V and 2V, if OFFSET is connected to
ground.
Rev. 1.00
12
August 16, 2005

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