ICS84325 데이터 시트보기 (PDF) - Integrated Circuit Systems
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ICS84325 Datasheet PDF : 15 Pages
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Integrated
Circuit
Systems, Inc.
ICS84325
CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER WITH FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Number
1, 2
3, 4
5, 6
7, 8
9, 10
11, 12
13, 24
16
14, 18
15
17
19, 20
21
22
Name
Type
Description
Q0, nQ0 Output
Differential output pair. LVPECL interface levels.
Q1, nQ1 Output
Differential output pair. LVPECL interface levels.
Q2, nQ2 Output
Differential output pair. LVPECL interface levels.
Q3, nQ3 Output
Differential output pair. LVPECL interface levels.
Q4, nQ4 Output
Differential output pair. LVPECL interface levels.
Q5, nQ5 Output
Differential output pair. LVPECL interface levels.
VCCO
VCC
VEE
PLL_SEL
Power
Power
Input
Pullup
Output supply pins.
Core supply pin.
Negative supply pins.
Selects between the PLL and crystal inputs as the input to the dividers.
When HIGH, selects PLL. When LOW, selects XTAL1, XTAL2.
LVCMOS / LVTTL interface levels.
VCCA
Power
Analog supply pin.
XTAL2, XTAL1 Input
Crystal oscillator interface. XTAL1 is the input. XTAL2 is the output.
Active High Master Reset. When logic HIGH, the internal dividers are
MR
Input
Pulldown
reset causing the true outputs Qx to go low and the inverted outputs
nQx to go high. When logic LOW, the internal dividers and the outputs
are enabled. LVCMOS / LVTTL interface levels.
F_SEL1
Input Pulldown Feedback frequency select pin. LVCMOS / LVTTL interface levels.
23
F_SEL0
Input Pullup Output select pin. LVCMOS / LVTTL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
RPULLUP
RPULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
KΩ
KΩ
84325EM
www.icst.com/products/hiperclocks.html
2
REV. B OCTOBER 11, 2004
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